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DDR5 SDRAM

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This is an old revision of this page, as edited by 37.152.42.229 (talk) at 14:08, 15 March 2017 (Added note regarding JEDEC's Server Forum and DDR5 Workshop.). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

DDR5 SDRAM
TypeSynchronous dynamic random-access memory (SDRAM)
Release date2020 estimated[1]
PredecessorDDR4 SDRAM

In computing, DDR5 SDRAM, an abbreviation for double data rate fifth-generation synchronous dynamic random-access memory, is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface under development.

According to a 2016 presentation by Intel's Geof Findley, JEDEC planned to release the specification for DDR5 SDRAM in 2016, with the memory being available for end user purchase in 2020.[1] As of March 2017, the specification does not appear to be released, and little specific information is publicly available.

JEDEC's Server Forum 2017[2] will offer a preview of DDR5 SDRAM on June 19, 2017.

JEDEC will host a DDR5 SDRAM Workshop[3] on October 31-November 1, 2017.

References