Talk:Open collector

Move to Applications

"Open-collector outputs can be useful for analog weighting, summing, limiting, etc., but such applications are not discussed here," in Function should be moved to Applications. There it should be shown and references how an open collector is used for analog weighting, summing, limiting, etc. Sjmoquin (talk) 03:13, 2 October 2014 (UTC)

TTL Logic

I think that the use of open collector in TTL logic should be mentioned as one of the relevant applications

Link with Open Drain

I think this article might benefit from some connection with the entry on Open drain. See also the talk page for that article. Mystic Pixel 03:45, 24 October 2006 (UTC) n,n,n, —Preceding unsigned comment added by 80.86.129.22 (talk) 10:12, 6 May 2009 (UTC)

No definition provided

Article should provide a definition before jumping straight to applications. —Preceding unsigned comment added by 209.19.246.2 (talk) 15:01, 26 October 2007 (UTC)

Definition too restrictive

There's no reason to categorize the open-collector or open-drain as an output in only digital logic. I've added a plug to that hole in the two articles, but I don't know how to change the categorization or the description immediately following the subject. Python2k (talk) 16:39, 19 April 2008 (UTC)

Picture is simply wrong

I can't fix it right now, but I wanted to leave a note -- the current version of the picture in this article is simply wrong. The lead with the arrow represents the emitter (not the collector, as it's currently labeled!) Mystic Pixel 10:57, 4 December 2007 (UTC)

Thanks to Omegatron for the fix. Mystic Pixel (talk) 09:29, 15 January 2008 (UTC)

Another confusing picture

Active-low wired-OR / active-high wired-AND circuit using open-drain gates.

Please have a look at this images's caption, as used in the current version of this article.

On the image's page, the summary says:

"A logic bus with an external pull-up resistor. Note the * indicating open-collector/open-drain NAND gates."

So is this a wired-AND or wired-NAND? I find it confusing to talk about wired-AND as long as the outputs have the negating bubbles. --Abdull (talk) 23:08, 7 February 2010 (UTC)

The "wired-AND" portion of the circuit is the direct connection of the outputs of the two open-collector gates. Those gates in the example happen to be NAND gates, but they could be any gate. Although in chip design it is likely they'd be NANDs, for the sake of simplicity it might be less confusing if the example gates were different (e.g. an AND and an OR). Mesdale (talk) 15:07, 16 March 2012 (UTC)

Open drain / open collector is naturally inverting. "ON", or logic 1, is when the output is activated. That means that the output is connected to ground - and so, with a pull-up resistor, an AND acts like a NAND. It gets confusing, no? To get real AND values out of an open drain device you need to use the inverted version, so showing an open collector NAND gate gives the logical functionality of an AND gate. Ergo, an OC-NAND is the correct gate to show for AND logic. Majenko (talk) 21:47, 11 June 2014 (UTC)

Hyphen, or not?

Which is the preferred term, "open-collector" or "open collector"? — Preceding unsigned comment added by 80.254.148.99 (talk) 10:46, 11 December 2012 (UTC)

Reference link

Reference link is broken http://www.scsita.org/terms/SCSI_Overview.html — Preceding unsigned comment added by Rajeshm75 (talk • contribs) 06:08, 24 September 2013 (UTC)

Irrelevant information

In the MOSFET section: "Such weak pullups, often on the order of 100 kΩ, reduce power usage by keeping input signals from floating. External pullups are stronger (perhaps 3 kΩ) to reduce signal rise times (like with I²C) or to minimize noise (like on system RESET inputs)."

This talks about inputs, but the page is about outputs. Should it really be there? Majenko (talk) 21:38, 11 June 2014 (UTC)

Consider adding a reference to I2C bus

The I2C communication scheme for embedded systems is the place that I've seen reference to open-drain (always as a feature of a microcontroller). I think that would be a good cross-reference for this article. — Preceding unsigned comment added by 68.115.235.85 (talk) 21:17, 30 September 2015 (UTC)

Less esoteric usage and better explanation required

"The content in articles in Wikipedia should be written as far as possible for the widest possible general audience." Ref. Wikipedia:Make technical articles understandable.

To me, this means that any technical terms and symbols need to be defined in some way - either in the article in which they are used or by a link to another article.

Also, two corresponding principles of clear writing are:

➊ to use only one term for each meaning and, inversely,

➋ to never use the same term to mean (even slightly) different things. (Slightly different meanings should have slightly different terms.)

Notwithstanding that Wikipedia needs to phrase its explanations within the vocabularies that are in common use in the disciplines that it covers and that such registers frequently do NOT follow these principles, we should nonetheless strive for clarity by adhering to them as far as possible within each article and making identification, where necessary, between equivalent terms in common use.

This article contains some terms and symbols which are undefined in either of the two ways above:

1. The word "open" (as in "open collector") is given an ostensive definition in the first sentence as meaning "externalised". But is this an accurate definition? Are there not many signals from ICs that are 'externalised' to a pin on device's chip carrier, but which are not 'open', in this sense? So, in the phrase "open collector", does not 'open' indicate something more like:

● "potentially floating" (i.e. when the output transistor is in cut-off) - of course, only while no external connection acts to strap it up or down, or, equivalently,

● "not connected (within the device) directly (or indirectly via a pull-down or pull-up resistor) to ground or positive rail voltage", or

● "not fully defined (by the chip/circuit-subsystem under discussion)", or

● "open to be defined (partially) by the rest of the circuit (outside the chip/circuit-subsystem under discussion)"?

2. The terms "low-Z" and "hi-Z" are used without definition in the section "Function". Having done a little study of electronics I found this confusing since "Z" is predominantly used to refer to impedance. (Indeed almost these exact terms are used in audio electronics to refer to low impedance and high impedance microphones and speakers – the whole first page of a Google search on "low-z hi-z" provides examples of this usage and nothing about logic gates.) The context suggests, however, that these terms may be more likely to mean, respectively, 'low-zero ' i.e. "positive-true logic" (logic "true" or "on" is coded as a high voltage) and ' high-zero ' i.e. "negative-true logic" (logic "true" or "on" is coded as a low voltage) – terms ("positive-true logic" and "negative-true logic", which are used in the following section) that are at least a little less ambiguous than "low-Z" and "hi-Z". If this is the case, then I would suggest either that an identification is made at some point in the article between "low-Z" and "positive-true logic" and between "hi-Z" and "negative-true logic" OR, better perhaps (following principle ➊), that only one term is used for each meaning throughout the article. If this is not the correct meaning, then an appropriate explanation of "low-Z" and "hi-Z" is needed. Please explain here - especially if you are the editor who wrote them - if you believe that the meaning of "low-Z" is not the same as "positive-true logic" and "hi-Z" is not the same as "negative-true logic".

3. The concepts "positive-true logic" and "negative-true logic" – although reasonably intuitive for someone with a little knowledge of the subject – are again used in this article without definition while apparently near identical concepts are referred to in Wikipedia article "Logic gate" by the names "positive-logic" and "negative-logic", respectively and in the Wikipedia article "Logic level" by the names "active-high" and "active-low", respectively. Whilst all this alternative nomenclature may be common in the literature — (Is it? I do not recall the terms "positive-true logic" and "negative-true logic" from any other context - if not, should we just dump these longer-winded terms in favour of the more succinct but slightly less explanatory "positive-logic" and "negative-logic"?) — whilst it may be common, a degree of unity within Wikipedia would serve to provide better linkage between articles and thus potentially greater immediacy of explanation for the reader – and without unnecessary duplication of description. To achieve both, it would, in my opinion, be a good idea to collect all these alternative terms for the same pair of ideas together into one article to which others might link. The most appropriate place for this purpose would probably be the "Active state" subsection of the article "Logic level". I propose, to this end, therefore, a coordinated revision of these three articles. Please make any comments here if you believe that I am misdirected in my understanding that the two reciprocal concepts are described identically, or nearly so, as indicated below or that such a revision/addition would be unhelpful:

"positive-true logic" ≡ "positive-logic" ≡ "active-high" [≡ "low-Z"]

"negative-true logic" ≡ "negative-logic" ≡ "active-low" [≡ "hi-Z"]

My proposed revision would be to insert, after the sentence "The two options are active high and active low." in the "Active state" subsection of the "Logic level" article, the paragraph,

"These two concepts are closely related, if not identical, to the concepts, respectively, of "positive-true logic" (also referred to as just "positive-logic" [or "low-Z"]) and "negative-true logic" (also referred to as just "negative-logic" [or "hi-Z"]), but whereas the descriptions "active-high" and "active-low" are usually understood to designate control signals, the "logic" descriptions are more often applied to the logical meaning ascribed to voltage levels whether or not they are used directly for control."

and then to link to the "Active state" subsection from the other two articles to serve as the definitions I think are required. Should the terms "Low-Z" and "Hi-Z" also be included here as I have in square brackets? If they are indeed commonly used and identical in meaning, I think so, but, again, I do not recall reading them in any other context than this article and my quickfire web searches do not reveal their usage in this context with these meanings.

Also, I don't currently have any authorities to quote for any of these assertions of identicality. If anyone can supply such that would be useful.

4. The emboldened letters "L" and "H" used in these sentences (in section "Function"), similarly do nothing to clarify what the sentences actually mean without a definition of the meaning of the emboldened letters "L" and "H".

On another point, it would be helpful, I think, for the article to explain the motivation for using such an open collector output as a separate stage from the logic gate itself. What I mean is, presumably the output signal labelled as "IC Output" in the diagram is, for example, the drain terminal of an output MOSFET* in the logic gate. The obvious question arises, "If an open output is desired, then why not simply 'externalise' the signal 'IC Output' itself as an open drain?" What is achieved by interposing a bipolar transistor and externalising it's collector instead of the MOSFET's drain? I can think of three possibilities: the output drive of the bipolar exceeds that of the MOSFET and/or the impedance of the bipolar output is more suitable for driving another gate's logic input and/or the bipolar is able to tolerate a higher Vcc than the MOSFET. However, I am no subject expert and I have yet to find a reference that treats this issue. It would be useful, I think, to address it in the article.

*Quite possibly, I am wrong here, due to my own lack of knowledge of the subject - maybe MOSFETs are never mixed with bipolar transistors in ICs, but, if so, please overlook the error - even if incorrect in this respect, it does provide an easy means of distinguishing between the logic gate itself and the output stage in my description: I hope the meaning is clear.

This also raises the question already opened in a comment by Python2k in 2008, "Are open collector circuits used anywhere other than in ICs (for example, in freestanding transistor logic circuits - what used to be referred to as "discrete logic" - but which term has suffered 'function creep' to now often mean 'a network of connected logic gates supplied on individual chips' (c.f. Talk:Logic_gate#Discrete_logic?)) or, indeed, anywhere other than in any logic circuits?" If so, then the lead paragraph really needs revision to be more inclusive, since it half implies (by absence of anything contrary) that open collector circuits are unique to integrated circuits. Hedles (talk) 15:32, 12 February 2020 (UTC)

See Logic_level#Active_state for context for 'active low' or 'active high' 17:15, 14 February 2020 (UTC)

Likewise see Three-state_logic#Use_of_pull-ups_and_pull-downs for context for 'low impedance' or 'high impedance' 17:15, 14 February 2020 (UTC)

Since implementation of an application using one kind of transistor family can be cheaper than mixing in other kinds of discrete components (e.g., resistors, batteries), design may hinge on economic factors. An example of this kind of business decision was the development of the op amp. Development of the wristwatch underwent a migration from mechanical movements to electronic circuit for timers, for these kinds of reasons. Selection of a suitable technology can be a difficult problem, often beyond the scope of the application, hinging on price. Side effects might be waterproof circuits as an unintended consequence. . . . 17:15, 14 February 2020 (UTC)

--Ancheta Wis   (talk | contribs) 17:15, 14 February 2020 (UTC)

Incorrect definition for 'open'

First, 'externalized' is quite a strange term to use here. Besides, the open in open collector does not stand for the collector being externally accessible. It stands for 'not connected'. This article needs serious work! — Preceding unsigned comment added by 71.198.108.47 (talk) 21:27, 4 January 2021 (UTC)

So, what is Analogous?

The Open-collector section describes "common emitter" (a particular BJT transistor topology) as analogous to the open-collector configuration, while the "open drain" section describes the "open source" configuration as being analogous to it. For those not familiar with these terms, the open-collector configuration IS a common-emitter configuration (because the emitter is shared by both the transistor's input AND it's output), while the open-drain and open-source configurations are NOT the same (the open-source shares the drain with input and output, while the open-drain shares the source with input and output). This seems like an undesirable inconsistency, as it implies that the two "analogs" are equivalent to each other. 2602:301:7764:AC00:D61B:81FF:FE9B:6F4D (talk) 11:13, 27 June 2023 (UTC)

Should have said "open emitter" instead of "common emitter". I think that might have been my mistake. Em3rgent0rdr (talk) 17:55, 27 June 2023 (UTC)

I've also edited a bit more to just avoid using the word "analogous". A 2-D table might better show the relationship. Em3rgent0rdr (talk) 18:11, 27 June 2023 (UTC)

Schematic Symbol

I guess the following description is wrong:

⎐ - open collector or open drain pin that outputs a low voltage when on or hi-Z when off.

I think the opposite would be correct:

⎐ - open collector or open drain pin that outputs a low voltage when off or hi-Z when on.

In other words: The output has low impedance when the input is low and high impedance when the input is high.

It's what the e.g. the 74LVC07A datasheet says. 2A02:AA13:1143:A280:D56F:74A9:C265:BBE9 (talk) 10:16, 18 August 2023 (UTC)

the article's source "Overview of IEEE Std 91-1984,Explanation of Logic Symbols Training Booklet" Table 3 for the ⎐ symbol says:

N-P-N open-collector or similar output that can supply a relatively low-impedance L level when not turned off. Requires external pullup. Capable of positive-logic wired-AND connection

The "74LVC07A datasheet" does have an input-output relation that does agree with what you say: "The output has low impedance when the input is low and high impedance when the input is high." However, that datasheet is referring to that 74LVC07A device's input-output relationship, not to the behavior of an open collector output.

When a NPN transistor in an open collector configuration is "ON", it forms a conducting path to ground and so outputs a low voltage, and when that transistor is "OFF" it is disconnected. So the original wording "outputs a low voltage when on or hi-Z when off" is still correct and what you propose to change it to would be incorrect.

(The 74LVC07A device's behavior could be because it maybe first inverts the input before sending it to the open collector/drain output transistors.) Em3rgent0rdr (talk) 15:24, 18 August 2023 (UTC)

Note: the 74LVC07A device is titled "Hex Buffer and Driver With Open-Drain Outputs". The word "With" is important. It is not titled as the entire device being just a set of six open-drain transistors. Rather it simply has open-drain transistors as outputs. Em3rgent0rdr (talk) 15:35, 18 August 2023 (UTC)

What is it describing, function, or implementation?

I find this article lacking in describing what "open collector" or "open drain" actually refers to. Does it refer to the implementation of the circuit, where a collector (for BJT) or a drain (for MOSFET) is exposed at the output of the circuit? Or does it refer to the function, the ability to pull the output towards ground, as opposed to pulling towards the positive supply? Equating "open drain" with "pull low" is only correct when using a N-Channel MOSFET (same for open collector and NPN BJT). A component that can pull up to positive supply with a P-Channel MOSFET, which exposes the drain, is clearly a "open drain" circuit but has an "open source" function. There is ambiguity, and the article is not clear about that. Regarding the symbol, I think this should always refer to the function, not the implementation. hence I would remove "open collector" from the description of the symbol, and simply describe it as: ⎐ - pin that outputs a low voltage when on or hi-Z when off. A note could be added that this is usually referred to as "open drain", but that is based on tradition and only correct for N-Channel MOSFET implementations. Mayrayday (talk) 15:59, 1 September 2023 (UTC)

Thanks, I notice now that I had left out the "NPN" from the "Schematic symbol" section...I just now have recopied the description from the original TI source reference with minimal word tweaking so that it is more closely-aligned to the original description. The word "NPN" was indeed important here.

I also did another edit to rename the section "Open drain, drives high" to now be "Open collector/drain, drives high". That section briefly describes the corresponding behavior of PNP and p-channel MOSFETs in open collector/drain configurations.

I believe it is overwhelmingly more common to use NPN and nMOS instead of PNP and pMOS for open collector/drain, and that common usage is reflected by this article having the majority of it be about NPN and pMOS. So I've made another edit to the intro to clarify that.

Hopefully that helps to answer your question about what "open collector" or "open drain" actually refer to...its behavior does indeed depend on the polarity of transistor involved because that affects whether the conducting state of the transistor will connect the output to ground or Vdd. Em3rgent0rdr (talk) 17:12, 1 September 2023 (UTC)

Thanks, I think the edits help to clarify to some degree. But I think there is still ambiguity what "open collector" or "open drain" can be applied to. While there is some attempt to specify that the explanations apply to NPN or N-Channel implementations, it does not state clearly how this should be applied to PNP and P-Channel implementations. Does "open collector" refer to a transistor collector being exposed as circuit output, or does it refer to the ability to sink current to ground? If there is ambiguity (no clear industry standard), then this should be stated. Additionally, the article is focused on digital logic.

For example, the datasheet of the LTC6102 describes the output as open-drain (though they do add "current output", which helps to clarify). "Open drain" here describes the circuit, but not the function (the function of this output is that it can source current from the positive supply, and hence I would call it functionally an open-source output, accordingly I would assign the symbol of a diamond with line on top).

I think in the most general "open collector" and "open drain" can be described as a circuit output that can sink current (towards ground or low voltage), but not source current.

Description then can be expanded from here, stating that the name's origin is in NPN BJT or N-Channel MOSFET technology, and point out that the name is somewhat ambiguous when it comes to PNP BJT and P-Channel MOSFET technology. The ambiguity is between describing the circuit and describing the functionality (context has to be taken into account).

Furthermore, "open-emitter" or "open-source" is the expansion of that traditional naming, describing an output that is able to source current (typically from a higher voltage), but not sink current. It is actually common to implement such outputs in PNP or P-Channel (which then defies the names "open-emitter" and "open-source"), so that the controlling voltage on the base or gate can be lower than the high voltage. Mayrayday (talk) 17:11, 5 September 2023 (UTC)

Open collector/emitter/drain/source without specifying polarity of transistor (e.g. npn vs pnp) describes what part of the transistor is an open circuit, but does not describe the electrical function, because that function depends on the polarity of the device. The more common bjt transistor polarity is npn because it has higher gain and most common MOS polarity nMOS because has higher conductivity, so "open collector" without specifying the transistor polarity is going to more commonly refer to "npn open collector". I'm going to try to think of the better way to reword some of this article, while trying to not jump back-and-forth between polarities...maybe the article should just always include the polarity.

If you want to talk about the function alone, then I was looking though some definitions and found "source driver" and "sink driver":

https://www.jedec.org/standards-documents/dictionary/terms/source-driver-current:

• pnp open-collector
• npn open-emitter
• p‑channel open-drain
• n‑channel open-source

https://www.jedec.org/standards-documents/dictionary/terms/sink-driver-current:

• npn open-collector
• pnp open-emitter
• n‑channel open-drain
• p‑channel open-source

Em3rgent0rdr (talk) 18:26, 5 September 2023 (UTC)

I made an edit which always adds npn/pnp/nMOS/pMOS in places where the distinction is important. I hope that I didn't unintentionally introduce an error. But hopefully that addresses your concern. Em3rgent0rdr (talk) 18:50, 5 September 2023 (UTC)

Thanks, I think this is more consistent.

The section "wire logic" needs to mention that the example given applies to NPN or nMOS (but can equivalently be expanded to PNP and pMOS).

I would replace the double inversion "when not turned off" in the symbol section witch "when turned on" for easier reading.

Final remark: while all the additions make the article more consistent, it does make it harder to read because of all the additional conditions. I think it might be helpful to explicitly add a short paragraph (near the top) explaining the duality between NPN and PNP (nMOS and pMOS) and the reason why an "open drain" etc. statement really always should be accompanied by the polarity of the transistor. Also, I think colloquially an "open collector" output simply refers to the ability to sink current, even if the actual transistor technology or polarity is unknown. Mayrayday (talk) 20:59, 5 September 2023 (UTC)

What is frustrating about this article is that there are 4 different "open" terminals (open collector, open drain, open emitter, open drain) for 4 different devices (npn bjt, pnp bjt, nMOS, pMOS). Hypothetically could have a separate article for every single configuration...but they are all closely related, so they belong in the same article. I'm thinking now I'll try to put a table in the introduction that summaries all the possible configurations... Em3rgent0rdr (talk) 22:33, 5 September 2023 (UTC)

I made a summary table at the top. Hopefully that helps and I didn't get something flipped. Em3rgent0rdr (talk) 23:36, 5 September 2023 (UTC)

also for the record while this article is focused on digital logic, it does have a section /* Analog */ which says:

> "Open collector outputs can also be useful for analog weighting, summing, limiting, digital-to-analog converters, etc., but such applications are not discussed here."

Feel free to expand that section if you find it needs more attention. Em3rgent0rdr (talk) 18:29, 5 September 2023 (UTC)

The table probably should be moved into a new overview section. I don't know if there is a rule against it, but I have a feeling that table probably shouldn't be on the left side above the table of contents. • Sbmeirow • Talk • 04:27, 6 September 2023 (UTC)

good point. I've moved the table into its own Summary section later in the article. Em3rgent0rdr (talk) 05:15, 6 September 2023 (UTC)

Title should be changed to be more general, to handle both open collector, open drain, open emitter, and open source

The article has been made more general, so it now covers all open collector, open drain, open emitter, and open source, in both pnp, npn, pMOS, nMOS configurations, with a summary table in the intro. So I'm thinking the article title should be made more general, like "open output (electronics)", and then "open collector" (and the others) would redirect to the new title. Em3rgent0rdr (talk) 23:46, 5 September 2023 (UTC)