Talk:Power ISA

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not clear about compliancy levels[edit]

" Features must be implemented in their entirety even if they are used as optional. " - this is not entirely clear. it seems to imply that even optional sections are in fact mandatory, which would seem... anomalous Lkcl (talk) 21:25, 8 May 2021 (UTC)[reply]

i went with "* Optional features, if chosen, must be implemented in their entirety (partial implementation of an Optional feature is not permitted)" https://libre-soc.org/irclog/%23libre-soc.2021-05-08.log.html#t2021-05-08T22:33:46 Lkcl (talk) 12:01, 9 May 2021 (UTC)[reply]

Power ISA developed by Power.org?[edit]

In these edits, @Ipr1 requested a citation for "[The Power ISA] was originally developed by the now defunct Power.org industry group.", saying "architecture was started by IBM in early 1990s and the group was started in early 2000s".

This is more of a case for Template:Clarify than Template:Citation needed. What happened was:

IBM developed the IBM POWER instruction set architecture (all caps "POWER") as part of a project that started at the Thomas J. Watson Research Center and that produced the first IBM RS/6000 systems and the POWER1 processor, and successors;^[1]
the AIM alliance took the POWER ISA, made some changes. and produced the PowerPC instruction set architecture (with a common subset of the two instruction sets allowing code to be generated that will run on POWER ISA or PowerPC processors, and with at least some compilers having that as a target option for the code generator) - IBM eventually went with the PowerPC ISA, rather than the POWER ISA, for RS/6000 systems, with the POWER ISA becoming a "legacy" ISA;
some group (Power.org?) took the PowerPC ISA and the embedded Book E spinoff, merged them into a single ISA, possibly made some other changes, and the result was the Power ISA (not-all-caps "Power").

Using both "POWER" and "Power" did not help keep things easily understood.

(Also, the project that led to the POWER ISA started in the mid-1980's, apparently.^[2]) Guy Harris (talk) 08:36, 6 August 2020 (UTC)[reply]

References

^ Cocke, J.; Markstein, V. (January 1990). "The evolution of RISC technology at IBM" (PDF). IBM Journal of Research and Development. 34 (1): 4–11. doi:10.1147/rd.341.0004.
^ Oehler, R. R.; Groves, R. D. (January 1990). "IBM RISC System/6000 processor architecture". IBM Journal of Research and Development. 34 (1): 23–36. doi:10.1147/rd.341.0023.

[1] Cocke, J.; Markstein, V. (January 1990). "The evolution of RISC technology at IBM" (PDF). IBM Journal of Research and Development. 34 (1): 4–11. doi:10.1147/rd.341.0004.

[2] Oehler, R. R.; Groves, R. D. (January 1990). "IBM RISC System/6000 processor architecture". IBM Journal of Research and Development. 34 (1): 23–36. doi:10.1147/rd.341.0023.

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