User:TooTallSid/Micro Programmable Controller

Micro Programmable Controller (MPC) was a special purpose computer developed in the mid ‘70s for dedicated military applications. Constructed from commercial-off-the-shelf electronics, the MPC was a “LAN in a box” with general purpose, microprocessor based computers connected by a parallel, message passing bus, with each computer dedicated to a single purpose, such as communications, file system services, supervisor control, and console operations.

One installation of the MPC at the headquarters (HQ) of the United States Air Force (USAF) Strategic Air Command (SAC) was in operation from 1978 to 1994. At the time the HQSAC MPC was decommissioned, there were 242 processors. During that 22 year period, the hardware had been completely replace twice, countless software changes had been made, and yet it was down for only 6 hours, during a building wide power failure.

Architecture

The MPC was a MIMD multiprocessor. Each computer was autonomous, sending status updates and receiving high-level supervisor commands from two or more control computers that monitored the health and coordinated activities of the whole system.

The message passing bus was a 16-bit wide bus, known as the X-Bus. Two classes of computer boards were used: CPU boards which contained an interface to the X-Bus, and I/O boards which did not. The CPU and the I/O boards were primarily based on Intel microprocessors (8080, 8085, 8086, 80186, and 80286). A Motorola 68000 CPU board was also designed for the MPC, but was never deployed. A special purpose bus arbiter board resided in the bottom slot of the card cage and granted fair access to the X-Bus.

The card cage used for housing the single board computers was designed with zero insertion force (ZIF) connectors, allowing for hot insertion and removal of both CPU and I/O boards. These slots were physically arranged so that each CPU board could host a dedicated I/O board. For sensitive deployments, such as millitary and government intelligence processing, the complete card cage could optionally be housed in a Tempest enclosure to limit EMI emissions.

Each CPU and I/O board ran a small, custom-designed RTOS, which was written in assembly language.

Software

In <DATE> Steve Sidner ported the CP/M-80 operating system to run on the processor board using mass storage supported by the disk controller. This provided a system management environment for files hosted by the OS. The Whitesmith's C compiler was available. In 1984 Roy Kimbrell wrote the C library which completed the development environment. The library was written in C but had to interface to the hardware unique file system; thus a custom C library was needed. Subsequently, applications could be written in C instead of using an assembler.

Applications

The MPC was used as a communications front-end and switch for message-level communications between host computers, communication lines, and terminals. There were also utility services for printing, file services, and debugging. Many of the applications written subsequent to the installation of a development environment were for the management of the numerous messages transferred by the MPC from one environment to another: e.g., from the DEC to the IBM environment. The messages were "dropped" into an in-box from an external source, e.g., a communications line or a computer system. Once there they could be moved to an out-box for transfer to an external communications line or computer system. They remained on the MPC until manually deleted. The users would use the message management application to review, move, and delete messages.

Processor Types

MACE OJ-389 HDLC DDCMP SPCL

History

The MPC was a joint project of the Naval Ocean Systems Command and two software contractors, Planning Research Corporation and Sterling Software.\

Technology Transfer

In 1986, Intel Corporation and Planning Research Corporation partnered to transfer some of the high-level system architecture and control concepts from the MPC to the Multibus II computer system under development by Intel. The Multibus II systems had the same architecture as the MPC. Ironically, the message passing bus was interfaced on each single-board computer by a dedicated chip calle the MPC, the Message Passing Controller.

External links

• example.com

Category:Parallel computing Category:Classes of computers