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It is a part of the [[SDRAM]] family of technologies, which is one of many [[DRAM]] (dynamic random access memory) implementations, and is an evolutionary improvement over its predecessor, [[DDR2 SDRAM]].
It is a part of the [[SDRAM]] family of technologies, which is one of many [[DRAM]] (dynamic random access memory) implementations, and is an evolutionary improvement over its predecessor, [[DDR2 SDRAM]].


Its primary benefit is the ability to run its I/O bus at four times the speed of the memory cells it contains, thus enabling faster bus speeds and higher peak throughputs than earlier technologies. This is achieved at the cost of higher [[SDRAM latency|latency]]. Also, the DDR3 standard allows for chip capacities of 512 [[mebibit]] to 8 [[gibibit]], effectively enabling memory modules of maximum 16 gigabyte in size.
Its primary benefit is the ability to run its I/O bus at four times the speed of the memory cells it contains, thus enabling faster bus speeds and higher peak throughputs than earlier technologies. This is achieved at the cost of higher [[SDRAM latency|latency]]. Also, the DDR3 standard allows for chip capacities of 512 [[mebibit]] to 8 [[gibibit]], effectively enabling memory modules of maximum 16 gibibyte in size.


==Overview==
==Overview==

Revision as of 06:11, 8 October 2007

In electronic engineering, DDR3 SDRAM or double-data-rate three synchronous dynamic random access memory is a random access memory technology used for high speed storage of the working data of a computer or other digital electronic devices.

It is a part of the SDRAM family of technologies, which is one of many DRAM (dynamic random access memory) implementations, and is an evolutionary improvement over its predecessor, DDR2 SDRAM.

Its primary benefit is the ability to run its I/O bus at four times the speed of the memory cells it contains, thus enabling faster bus speeds and higher peak throughputs than earlier technologies. This is achieved at the cost of higher latency. Also, the DDR3 standard allows for chip capacities of 512 mebibit to 8 gibibit, effectively enabling memory modules of maximum 16 gibibyte in size.

Overview

DDR3 memory comes with a promise of a power consumption reduction of 30% compared to current commercial DDR2 modules, due to DDR3's 90 nm fabrication technology, allowing for lower operating currents and voltages (1.5 V, compared to DDR2's 1.8 V or DDR's 2.5 V). "Dual-gate" transistors will be used to reduce leakage of current.[citation needed]

The main benefit of DDR3 comes from the higher bandwidth made possible by DDR3's 8 bit deep prefetch buffer, whereas DDR2's is 4 bits, and DDR's is 2 bits deep.

Theoretically, these modules could transfer data at the effective clock rate of 800-1600 MHz (using both edges of a 400–800 MHz I/O clock), compared to DDR2's current range of effective 400–800 MHz (200–400 MHz clock) or DDR's range of 200–400 MHz (100–200 MHz). To date, such bandwidth requirements have been mainly found in the graphics market, where fast transfer of information between framebuffers is required.

Prototypes were announced in early 2005, and products are appearing on the market as of mid-[2007], in the form of motherboards[1] based on Intel's P35 "Bearlake" chipset and memory DIMMs at speeds up to DDR3-1600.[2]. AMD's roadmap indicates their own adoption of DDR3 to come in 2008.

While electrically incompatible, DDR3 DIMMs have 240 pins, the same number as DDR2, but with a different key notch location.[3]

GDDR3 memory, with a similar name but an entirely dissimilar technology, has been in use for several years in high-end graphic cards such as ones from NVIDIA or ATI Technologies, and as main system memory on the Microsoft Xbox 360 and the Sony PS3. It is sometimes incorrectly referred to as "DDR3".

Spec standards

Chips and Modules

Standard name Memory clock Time between signals I/O Bus clock Data transfers per second Module name Peak transfer rate
DDR3-800 100 MHz 10 ns 400 MHz 800 Million PC3-6400 6.40 GB/s
DDR3-1066 133 MHz 7.5 ns 533 MHz 1.066 Billion PC3-8500 8.53 GB/s
DDR3-1333 166 MHz 6 ns 667 MHz 1.333 Billion PC3-10600 10.67 GB/s[4]
DDR3-1600 200 MHz 5 ns 800 MHz 1.6 Billion PC3-12800 12.80 GB/s

Features

DDR3 SDRAM Components:

  • Introduction of asynchronous RESET pin
  • Support of system level flight time compensation
  • On-DIMM Mirror friendly DRAM pin out
  • Introduction of CWL (CAS Write Latency) per speed bin
  • On-die IO calibration engine
  • READ and WRITE calibration

DDR3 Modules:

  • Fly-by command/address/control bus with On-DIMM termination
  • High precision calibration resistors

Advantages compared to DDR2

  • Higher bandwidth performance increase (up to effective 1600 MHz)
  • Performance increase at low power (longer battery life in laptops)
  • Enhanced low power features
  • Improved thermal design (cooler)

Disadvantages compared to DDR2

  • Commonly higher CAS Latency
  • Generally costs more than equivalent DDR2 memory

References

  • "DDR3 SDRAM: Revolution or Evolution?". X-bit labs.
  • Raj Mahajan. "Memory Design Considerations When Migrating to DDR3 Interfaces from DDR2" (PDF). MemCore Inc www.memcoreinc.com.
  • Gregory Agostinelli. "Method and Apparatus for fine tuning a memory interface". US PATENT OFFICE.

See also