Talk:Magnetic-core memory

Type of Ferrite Material Used

Does anyone know what type of ferrite material was used for the rings? Common types are 43 material, 61 material, and 73 material. 75.164.242.189 (talk) 01:23, 13 April 2009 (UTC)

Material with a square hysteresis loop. (I don't know about catalog numbers.) Ask if you need more info. Regards, Nikevich (talk) 06:25, 19 June 2009 (UTC)

Core plane image

Kudos to Sanders muc for contributing the core scans. :-) Would you be able to count the lines (and number of cores) in one direction so we could calculate the memory capacity in bits & bytes for the plane shown? It would give the article even more educational value if the readers were able to immediately compare core to semiconductor RAM chips in that parameter, I think. --Wernher 16:07, 2 May 2004 (UTC)

Ok, I counted them. Its an array of 128x128 rings, totalling to 2 KiB. Is there, BTW, a way to get a caption under an image without the "thumb" option? Sanders muc 09:31, 3 May 2004 (UTC)

Yes, I fixed it, at least temporarily. What I'd really like, for consistency, is a captioning scheme looking just like the thumb & caption scheme but without the thumb option. However, I haven't found this yet. --Wernher 20:17, 5 May 2004 (UTC)

"framed"? — Omegatron 13:54, 24 March 2007 (UTC)

Another image (by Andreas Feininger ?), from the Google Life Magazine archive LIFE Sage Air Defense System - Hosted by Google - "For personal non-commercial use only" - I haven't read the fine print ... --195.137.93.171 (talk) 12:12, 25 December 2008 (UTC)

Closeup image

The caption says the distance between the cores (rings) are 1mm. Eh -- which distance, the short one between cores in a 'quad-core group', or the long one, between cores in different groups? --Wernher 02:06, 8 May 2004 (UTC)

• Well, sort of the middle between them. Its only a rough estimate. Maybe I take a magnifying glass with me to check. By the way, the quad groups don't have anything in common. It's only due to mechanical strain in the wiring. Sanders muc 11:34, 9 May 2004 (UTC)

"The light color vertical and horizontal wires are X and Y wires, the diagonal wires are Sense wires, the dark colored horizontal wires are Inhibit wires."

What diagonal wires?? — Omegatron 01:48, 18 March 2007 (UTC)

Exactly what I was going to ask. Even at the full resolution I can't see any diagonal wires. --Zero^talk 06:21, 29 April 2007 (UTC)

There are no diagonal wires in this core plane as it is a "2-wire" plane, not the "4-wire" plane in the photo originally shown when the caption was written. Someone changed the photo. Note: a "2-wire" memory does not use X-Y addressing as discribed in the text. It uses word line addressing (probably the thicker wires) and multiple bit line sense/inhibit wires (probably the thinner wires). I wish someone would change the photo back so it matches the text and caption. -- 205.175.225.22 (talk) 00:30, 30 January 2008 (UTC)

Unfortunately the previous image "Core2.jpg" has been deleted from both Wikpedia and Commons. Qwfp (talk) 12:50, 30 May 2009 (UTC)

As the image exists now, there's the statement ""The light color vertical and horizontal wires are X and Y wires, the diagonal wires are Sense wires, the dark colored horizontal wires are Inhibit wires." This is incorrect; it refers to an earlier image, it seems. The inhibit wires must be the irregular (twisted?) red-orange vertical wires, because their flux cancels the flux of the addressing wires for that plane. Regards, Nikevich (talk) 06:30, 19 June 2009 (UTC) → (Update): I re-wrote the caption; I trust that the Y lines are vertical in the image. Nikevich (talk) 07:10, 19 June 2009 (UTC)

Core in Star Trek

I would like to add this to Core Trivia:

• In Star Trek, computer memory devices are called Memory core, interestingly similar to Core memory.

But, it looks like a POV problem. Especially that I'd love to say how core and memory are being misused there... Now what do you think could be said here about the subject? And where could I criticize that misuse? :) --Arny 08:19, 23 October 2005 (UTC)

I don't know if it belongs in trivia, but I've noticed - with the introduction of multiple processor Intel Core chips - that folks are starting to use the term "core" to refer to processors rather than memory. E.g. webopedia entry. Michael Daly 21:00, 14 January 2007 (UTC)

Curie point

The temerpatures quoted in the article seem to be waayyyy too low to me. My understanding was that the core was heated up to close to the Curie temperature, which I thought was 450 degree Kelvin (!) (or something like that) for ferrite cores. That would be around 300 or 400 degrees farenheit. The point of getting the core so hot was in order to minimize the switching time: the magentism of the cores could be flipped much much faster, if it was held close to, but just below, the Curie point. Yes, this means that you'd have an oven in the air-conditioned glass room. But I remember working with these things: two full-size boxes (five feet high, 3 feet wide), with 16KBytes in each box, and these had burnt-looking metal and asbestos poking out everywhere if you opened the front sheet-metal door. Surely my memory is not that bad...

In general, I think the article needs a section on switching speed and the Curie point. Unfortunately, I am not qualified to add this. linas 03:06, 27 November 2005 (UTC)

Core memory was NOT operated at anywhere near the Curie temperature. The switching time is relatively independent of temperature, though the required current is not. For a technical description of the operation of a typical late 1960s/early 1970s core memory subsystem, see DEC MM11-E Core Memory Manual (PDF).

The earliest core memory systems were not temperature compensated, so they were heated, but to temperatures well below 100C. The reason for heating was only to maintain a constant temperature such that a fixed drive current could be used. --Brouhaha 09:45, 12 November 2006 (UTC)

That sounds right. I remember our IBM 1620 (early 1960s vintage machine) having to warm up its core memory as part of power-up. Paul Koning (talk) 21:12, 9 April 2008 (UTC)

Other Forms of Core Memory

This paragraph makes no sense to me:

Another form of core memory called core rope memory provided read-only storage. In this case, the cores were simply used as transformers; no information was actually stored magnetically within the core.

How does it work and why is it called memory if no information is stored? Landroo 02:56, 13 April 2007 (UTC)

See the article on core rope memory; the information was stored by weaving the various "word lines" inside the core (for example, for a "1") or outside the core (for a "0"). So the information was stored by the person who originally wove the word lines (assembled the memory system), but wasn't stored in the various "bit cores" per se.

Atlant 13:17, 13 April 2007 (UTC)

Writing to Core Memory

Could someone with the knowledge please explain the following section:

Writing is similar in concept, but always consists of a "flip to 1" operation, relying on the memory already having been set to the 0 state in a previous read. If the core in question is to hold a 1, then the operation proceeds normally and the core flips to 1. However if the core is to instead hold a zero, a small amount of current is sent into the Inhibit line, enough to drop the combined field from the X, Y and Inhibit lines below the amount needed to make the flip. This leaves the core in the 0 state.

Is this section talking about normal writing or the "write-after-read cycle"? If it is normal writing, I makes no sense to me why you would just flip to 0 or 1. If it is the "write-after-read cycle" it makes much more sense, but I don't think that is clear from the text.

Bajsejohannes 18:45, 24 July 2007 (UTC)

There is no "normal writing" as you refer to it. Core memory always operated on a "read/write cycle", where the write always followed a read - therefore the word was all 0 state when the write phase of the cycle began. If the data read was not needed, it was simply ignored. -- 205.175.225.22 (talk) 00:07, 30 January 2008 (UTC)

Use of Ferrite Core Memory

• "Since modern semiconductor, random-access memories are usually volatile, older technology memories such as ferrite core continue to be used on spacecraft." —Preceding unsigned comment added by Parallelized (talk • contribs) 23:07, 28 January 2008 (UTC)

Speed

The memory speeds given in the article don't match the state of the art. In 1964, CDC (in the 6600) has 1 microsecond cycle time core memory. Paul Koning (talk) 01:13, 24 March 2008 (UTC)

Some other parameters differ, too. Read/write current in that memory was 200 mA. Paul Koning (talk) 14:31, 10 April 2008 (UTC)

Shaking the core to bits (or shaking the bits in the core)

Alas, the reference I have for this piece of information is not on the web - it's in the private papers of Richard Brent (scientist), who is the person who wrote the program that was able to make the core frame rattle in waves, causing it to destruct. The next time I'm there, I'll find the exact date for the reference, but it was during his doctoral research in Stanford in the late 1960s.

Would that be suitable reference, and not regarded as an "Urban Legend"? If so (I'll give it a week) I'll restore the line under "trivia".

Reynardo (talk) 15:02, 9 April 2008 (UTC)

It's not a very accessible reference, is it? Don't know what other Wikipedia editors think but I'd find this one hard to accept. Look at the Wikipedia policies on reliable sources and see if this would qualify. I don't know a whole lot about core memory and so I don't understand how it would work. There should be darn close to zero leakage flux between the cores. And the currents in the wires are only a couple of amperes, so how much force could there be between the wires? The wires don't run parallel with each other for great distances - you want to avoid that for cross-talk reasons. Trivia sections are discouraged, anyway. Was there ever an engineering bulletin or advisory put out to users not to do this? The more I think about it, the more dubious it sounds. --Wtshymanski (talk) 17:55, 9 April 2008 (UTC)

I don't buy it either, not without a published reference from a reliable source.

I was familiar with the PDP-1, the TX-0, and the LINC, all of which date from the early days of core memory. There were no audible sounds coming from the core memory. At least the first two were in hacker environments where any such characteristics would have been noted and exploited for their amusement value.

Programs to play crude tunes on almost every computer in almost every conceivable manner (chain printers... of course, the built-in speaker on the LINC... the "harmony compiler" on the PDP-1) existed. If core memory could be made to vibrate physically, it's just not conceivable that this wouldn't have been widely known.

I concur with Wtshymanski seat-of-the-pants judgments about the sizes of the currents and the forces involved.

Some branch of the military made heavy use of "magamps" and magnetic-cored-based computing elements in the days before transistors were available, and generally speaking I thought of core memory as being rugged, not fragile.

I heard (but never witnessed) of a hack that made core memory in an IBM mainframe... probably a 709 or 7090... generate RFI that produced harsh but recognizable tunes if a transistor radio was placed nearby. I find this believable. Perhaps the urban legend is derived from this. Dpbsmith (talk) 20:21, 9 April 2008 (UTC)

From how it was explained to me (as this is not my area of expertise) the core memory is written by flipping the ring on the pair of wires from one side (0) to the other (1). The program worked by having the rings flip in physical sequences, so that the flip moved like a well-synchronised Mexican wave, causing waves of movement across the frame. By having the waves timed to cause peaks and troughs in the right frequency, the frame would start to shake. It wasn't current leakage, nor was it to do with localised music - it was wholly and solely a physical co-ordination of the rings.

I appreciate that the source is not highly accessible, but I'll check with Dr R. Brent next week about what form the notes take. It may well turn out to be primary level laboratory notes, which ought to be allowed. As to it being trivia, that's a difficult one to judge. Where does one draw the line between information that might be of use, and trivia? Reynardo (talk) 16:58, 12 April 2008 (UTC)

You say: "from how it was explained to me (as this is not my area of expertise) the core memory is written by flipping the ring on the pair of wires from one side (0) to the other (1)."

This is not how core memory works. There is no physical or mechanical motion of the cores. All that changes is the direction of magnetization inside the core. It is purely electronic, and there are no moving parts. Dpbsmith (talk) 22:56, 12 April 2008 (UTC)

*sigh* Then I shall pin this source down and BEAT HIM for spinning me along on it. Reynardo (talk) 06:07, 13 April 2008 (UTC)

A Core Memory Designer Tells it as it Was!

I designed core memories from 1960 to the early 70s, and memories with early semiconductors, such as the Intel 1103.

Core sizes in my time went from 80mil (2mm) OD, down to 14mil. Various mixes of materials were used to get a good square loop and small amounts of Lithium were included in later cores. These Ferrites were very different from those used in transformers, but had commonality with mag-amp cores. In 1966 I designed a 16KB memory with 250nS access and 750nS cycle times, which was successfully manufactured for a number of years. In the UK these were known as "stores" rather than memories.

This memory used 22mil cores; X, Y, and Inhibit currents were about 400mA, and the sense output for a "1" was about 40mV peak. To establish the currents with 50nS rise times needed about 35V drive voltage, and the windings were treated as matched transmission lines to achieve clean waveshapes. Later smaller cores could use smaller currents, at the expense of a lower sense voltage.

Sensing was an art, as the signal was accompanied by a large common mode disturbance, and during a "0" write cycle a differential signal of at least a volt. It was necessary to sample the sense output at the right time to get the best signal to noise ratio.

Continual reading and writing a "1" caused the core to heat up due to hysteresis losses, reducing the operating tolerances. A well designed memory with currents temperature compensated would work with currents varied over a range of +/-10%, although we would control them much tighter than this.

The cores did change shape very slightly when switched due to magnetostriction effects. Military memories were encapsulated to withstand shock and vibration, but the encapsulating medium had to be elastic to allow magnet-striction to happen, otherwise domain reversal couldn't take place.(Epoxy was too rigid, silicones were preferred).

As semiconductors came in as a competing technology, the core memory exhibited "Sailing Ship Syndrome", as manufacturers managed to make them smaller, faster, and cheaper, with larger capacities. The Intel 1103 DRAM chip (1KBit) produced a system that was just inferior to the best core systems, but need a refresh system to update the volatile cells, requiring the memory to be interrupted for about 2% of the time.

4Kbit semiconductor memory chips sounded the deathknell of the ferrite core for most applications.Contributing factors were the complexity of the core memory drive and sense circuitry, and the size and complexity of the power supply systems.

CharlyGaul (talk) 19:25, 8 May 2009 (UTC)

Manufacturing

It would be great to add a section on how the memory modules were made. When I worked at ITL in the UK (formerly CTL), the story was that core memory was hand-woven by little old ladies in Wales who used to make lace before lacemaking became automated. I think that's pretty fascinating... 76.195.252.202 (talk) 15:46, 24 July 2009 (UTC)

An old technician's lament

If I had forseen it, I would have saved so much of my old references for use on Wikipedia. I have maintained machines that were amazing achievements at the time. This article brings to mind one of them: a disk emulator device with a half a megabyte of core memory on a single card. It was very large (I seem to remember about 2.5 feet by about a foot by nearly an inch thick), and was in fact two cards that sandwiched the cores. One failed and we opened it, and the core area just looked like black cloth. The card was 8 bit plus parity, so I was looking at an area with over 4.5 MILLION cores. I wish I still had the documentation on that one.Murasaki66 (talk) 03:15, 4 September 2009 (UTC)

Magnetic Ceramic?

Noticed the article says "uses small magnetic ceramic rings" in the 2nd sentence. Is that correct? I know they are made of ferrite, as mentioned later in the article. I know many look very ceramic, but to my mind that seems to be due to encapsulation in paint or similar. Could someone put me right if they ARE ceramic and explain a little. I actually repaired these things back in ≈1989-1992! --220.101.28.25 (talk) 07:02, 2 January 2010 (UTC)

According to Wikipedia itself "A ceramic is an inorganic, non-metallic solid prepared by the action of heat and subsequent cooling". Ferrite is surely metallic. Might be splitting hairs but I would like this to be expalined if possible. --220.101.28.25 (talk) 09:17, 2 January 2010 (UTC)

Ferrites aren't conductive and aren't metallic. --Wtshymanski (talk) 15:38, 2 January 2010 (UTC)

Wrong. On both counts. The magnetic constituent of ferrite is iron which is most definitely a metal. Ferrite is basically a crystaline form of iron often with other ingredients added. Ferrite as it is normally encountered would appear to be non conductive, but this comes about because it generally has a non conductive 'skin' due to surface changes to the material, but also because the matt surface doesn't provide a good contact surface. If you were to polish the end faces of a piece of ferrite material (such that they look like a mirror) and then plate a metalic surface such as silver (which can be deposited chemically), to those mirrored faces, the ferrite will have a fairly low resistance. 109.145.22.224 (talk) 09:52, 29 April 2012 (UTC)

Iron is a metal. Iron oxide is not. Sodium is a metal. Sodium chloride is not. Klaus Finkenzellar in "RFID Handbook", Wiley, ISBN 0-470-84402-7 page 108 says in part

Ferrite is the main material used in high frequency technology. This is used in the form of soft magnetic ceramic materials (low Br), composed mainly of mixed crystals or compounds of iron oxide (Fe2O3) with one or more oxides of bivalent metals (NiO, ZnO, MnO etc.) (Vogt. Elektronik, 1990). The manufacturing process is similar to that for ceramic technologies (sintering). The main characteristic of ferrite is its high specific electrical resistance, which varies between 1 and 10⁶ ohm m depending upon the material type, compared to the range for metals, which vary between 10⁻⁵ and 10⁻⁴ ohm m....

--Wtshymanski (talk) 16:53, 30 April 2012 (UTC)

At the very least you could pop over to Ferrite (iron) which shows up you usual lack of knowledge on the subject. 109.145.22.224 (talk) 10:24, 2 May 2012 (UTC)

Same word, yes, but two different meanings. You are of course familiar with the difference between different allotropes of iron, and a *chemical compound" of iron with other substances. I conclude you are only trying to bait me. --Wtshymanski (talk) 13:33, 2 May 2012 (UTC)

Issues of bias

I've just reverted a whole bunch of edits by Ggordonbell as near-CoI. Although Cgordonbell is not directly involved he is clearly acquainted with people that are and it has raised the usual CoI issues of bias. Perhaps most notable of these issues is the denigration of Viehe's work. My understanding is that it relates primarily to the implementation of logic gates using cores rather than actual memory. However, memory can in turn be implemented using gates and and it seems clear that this was in fact done. There portraying it as a complete irrelevance simply because a later innovation worked differently is misleading.

There are similar issues elsewhere - the one that catches my eye is the assertion that the write-after-read cycle was devised in 1951 as part of core memory memory development. This is clearly not true: it goes back at least as far as the Williams tube in 1948 and quite probably earlier.

This is not to say that Cgordonbell's input is not welcome, nor am I challenging his integrity. We simply have to bear in mind that personal recollections of event that happened 60 years ago may not be the most accurate thing to rely on. Even current personal testimony can be problematic since those directly involved in a project only ever see it from their own perspective and are less aware of the activities of others working in the same field. For this reason a personal email can never be relied on as a source for a quote and we need to be extremely vigilant when these kind of issues arise. Crispmuncher (talk) 16:05, 13 April 2011 (UTC)

You also reverted a number of edits which seem uncontroversial improvements. That is rather impolite. Are you planning to restore those? —Ruud 17:13, 13 April 2011 (UTC)

I was going to say "No, the onus is on the potentially CoI editor to raise issues on a case-by-case basis". However, I now note that the read-rewrite error is long-standing and not in fact recently introduced so I'll plead mea culpa and give him the benefit of the doubt and re-introduce the less contentious stuff. Thinking about it ISTR I have the perfect source for Viehe-related stuff. I'll try digging that out so it may be a couple of hours before I get around to it. Crispmuncher (talk)

None of my edits have anything to do with my own 60 year recollection. I only go back 55 years to programming the 650 and Whirlwind at MIT and then programming the English Elecric Deuce that Turing designed see papers on my homepage. I then turned to hardwdare at Digital Equipment with a 6 year sojourn as a faculty member at CMU.

I think Forrester's recollection in that email is worthwhile and wish that as a respected inventor and scholar we could quote it. I think he has earned the right. If there's a way, I would like to enter it, but I'm Ok omitting it and as a result having a drier less human story. Primary sources are gold as they are direct. All these issues we are discussing come because we do not have primary sources and have to imply so much and so much causality. No doubt somewhere in court records or wherever what he wrote to me earlier this month when I ask him about the connection is true, but the Papian quote re. "Yes we were all looking at cores" is good enough. Cgordonbell (talk) —Preceding undated comment added 09:04, 14 April 2011 (UTC).

Alright, I reverted your revert, as this is really a very, very bad way to interact with new editors, who are clearly willing to communicate you. Could you instead provide some concrete comments on that additions with which you disagree? —Ruud 20:18, 14 April 2011 (UTC)

I disagree. BRD is a normal editing process and POV needs stamping on when found. I feel it best to eliminate the entirety when it is encountered: new material can be added as it is discussed and considered but subtle POV can at times be difficult to identify. You can disagree with that if you like but I reject the accusation that this is shoddy practice.

OTOH I do apologise for not making those edits I referred to above. As I noted I went off to find a reference and my internet went down while I was doing it. Turns out that reference is a duff one anyway: it refers to Maurice Karnaugh's work with magnetic core threshold gates. Crispmuncher (talk) 21:28, 14 April 2011 (UTC)

Sure, that works very well for experienced editors. For well-intentioned new editors this can be a little intimidating, however, and we should try be a little more courteous. —Ruud 22:07, 14 April 2011 (UTC)

Magnetic-core memory History Section, suggested modifications: PLease HELP Me!

Dear Rudd and Crispmuncher, I am happy to write this note about each of the changes I made, but I do not like the implication that I had any other motive, or COI, when it comes to the getting the facts right and making the story interesting. I would like to appeal that this discussion is not a COI and should be retitled as History, I have just been trying to make the core memory history entry correct, especially since I was on the Wang Institute Board of directors and knew An Wang and have known Forrester for 50 years. Some issues I’ve tried to clarify the Core Memory history section. From the 3 patents, I have the utmost respect for Viehe and his clever circuitry and later work on core memory manufacture, but long after the core memory was invented. This is just background that I know or have known 3 of those mentioned, including Ken Olsen cited in a patent...he was my boss when I headed R&D at Digital Equipment Corp. Each suggested change is backed with citation and I don't think there are any loaded words or unsubstantiated statements e.g. Forrester learned from Wang.

• Please note that the topic, Magnetic Core Memory is stated in the first sentence. Neither Viehe or Wang are relevant unless cited links can be shown! I have no problem that they are included, but with clarity as to what they did even though I BELIEVE IT LACKS RELEVANCE TO THE TOPIC.
  • Magnetic-core memory is an early form of random-access computer memory.
• E.g. the statement of “Wang patenting while Woo is ill” just has to be cited, and if such it does cast a light on An. It is by implication a nice attack on the integrity of Wang. But mostly I really want the history to be correct including having the citation especially the ad hominems.
• No attack on Viehe (I don't do that… and why I would like this attack on my own integrity to be relabeled as a discussion of the Core Memory History section) and why I listed his 3 relevant patents: the first two were on using core's for digital systems design and the later one for manufacturing. The patent titles tell the story. There was a short era, Magnetic Era, in the 50s that was AR (after relays) and BT, BC (before transistorized logic and before computers) that traffic controllers and other complex systems were built in a hard wired fashion. (Our DEC PDP-8 ended this by 1965 when complex systems were built from computers. SRI patented some of this technology and a computer was constructed using cores as the logic elements also SRI lists several impressive systems built using their core logic. See http://www.sri.com/about/timeline/allmagnetic-logic.html and listen to http://data.computerhistory.org/dspicer/crypt/Hew_Crane_SRI_Mag_Logic_Computer/hew_crane_10_22_2004_ds.mp3 I did not add or subtract any notion of causality re Viehe re the Core Memory. I believe there is none, but I wouldn’t dare tackle this. I do believe the article must somehow separate the use of core for storing a 3d array of bits and cores used for constructing logic i.e.. using “ands” and “ors”.
• “Frederick Viehe first patented magnetic core memory in 1947, having developed the device in his home laboratory” is probably the most misleading statement that can be made regarding the core memory, not core transformers for logic. This is what comes up when you do a search and it is so, so wrong... if you assume memory => store a reasonably large number of bytes. If I could figure out who really cares about this page and history, I would like to suggest that unless they can cite a connection, it could be removed. As long as the statement is correct re. logic vs. memory aka storage, then no harm is done except the general public will assume that Viehe played a role in the 3D core memory store.
• I concluded by reading the title of the page, that this is about the history and use of the 3D core structure as in say a PDP-8 that had 12, 4K x 4K planes to given an array of M(0:4095)<0:11> or 4K, 12 bit words. This was my comment on Viehe's 2 patents had nothing to do with storing bits as in an array, any more than Faraday's observation that transformers were magnetized with DC. I did not remove Viehe' entry, only made it correct even though I don't think it is relevant.
• I made the comment that Wang created a shift register for use with core logic, creating a one word wide, serial memory of M(0:~32)<1> or about 50 bits. Again, nothing to do with the 3D core memory as there was no way to scale it to be competitive or useful as a memory array. This particular shift register is in the Computer History Museum and was given to me in or around 1980 for the Computer Museum in Marlboro by a person who worked for me, who got it from his father-in-law, a Harvard janitor working in and around the Aiken lab where Wang had worked.
• Walker patent is a red herring that I stated that it was a cross-point switch. U.S. Patent 2,667,542 "Electric connecting device" (matrix switch with iron cores), filed September 1951, issued January 1954 — Preceding unsigned comment added by Cgordonbell (talk • contribs) 09:55, 14 April 2011 (UTC)
• Two comments I think were of general interest:
  • Since there was a comment that Wang got 500K, I wanted to point out that Forrester got 13M for his patent. Viehe got 500K from IBM I believe, but should be checked, and the patents were assigned to IBM. It might have been for use in their electromechanical systems that used relays prior them using vacuum tubes, but we should not conjecture!
  • I put in the nice quote that relates to invention directly from Forrester on the seven years to convince industry to use, and seven to convince them they didn’t invent it. There is no reason to have only dull stuff, facts, etc.. This to me says a lot about the difficulty for inventors and is nice to read and that engineers understand and appreciate and will quote.
• Note that I changed the entry saying that Forrester got whatever from Wang is a statement I wanted to clarify because there is NO citation for it and I happen to believe it is wrong. That statement in effect seemed to be made by this reasoning: Wang and Forrester worked in the same town and patented stuff that employed magnetic cores. Wang filed before Forrester. Therefore Forrester got his idea from Wang. I have three comments to address the origin of the idea.
  • The statement: "Jay Forrester's group, working on the Whirlwind project at MIT, became aware of this work." should be substantiated. — Preceding unsigned comment added by Cgordonbell (talk • contribs) 12:33, 14 April 2011 (UTC)
  • Forrester is cited in Annals of Computing History Interview as a first hand recollection c1975 that is a beautiful account of the invention.
  • Forrester’s work and background is well documented starting with the Journal of Applied Physics. I cited the article in The Computer Museum Report where Papian, who actually built the first memory for Whirlwind, and spoke about the connection between Wang and Forrester that I believe is essential to the story.
  • [1] Email from Jay Forrester to Gordon Bell regarding the co-incident current core memory invention. I got this email from Jay that was left quoted, but I can understand why that is not applicable and want to find out how I can get a statement from Forrester to be entered now. That may be a potential problem, but is Jay's problem. We must value SIGNED primary sources! We are asking something from the inventor... and all are suspect, but at least you have it from the inventor who did it and it is signed. How do I get the statement in the email entered into Wikipedia?

As someone who uses Wikipedia, contributes $ to it, and now is trying to make a serious entry. I also encourage all my friends who use it, yet won’t correct the parts that they are expert in, to work to make it right. Based on this experience I may be forced to agree with them and Wikipedia will have gained another strong voice of dissenters. As a minimum, it is clear that I am unwelcome.Cgordonbell (talk) —Preceding undated comment added 08:22, 14 April 2011 (UTC).

Rudd and Crispmuncher, At this point, it seems like I should just go away as I have made some careful, considerate changes that were deleted and worse yet accused of being conflicted and biased even though I have stated no personal opinions... and by implication unqualified to write aboout history even as a founder to The Computer Museum in 1975 that begot the The Computer History Museum. I was involved in the collection of many core artifacts including both the Wang shift register and Forrester co-incident current memory.

Please confirm that I am persona non grata as a newby, should disappear in order that you older Wikipedians can continue to create your own history based on random factoids, loosely held together with some suppositions and accusations, of which this page is, I hope, just an outlier. I truly would like to contribute as my various books about computers and how they got that way are pretty well accepted. Cgordonbell (talk) —Preceding undated comment added 09:12, 14 April 2011 (UTC).

No you are very welcome as an editor. Some editors, including Crispmuncher, can be a little impatient with new users. I've asked him to comment on your changes instead of simply reverting them. Let's wait for his reply. Cheers and welcome, —Ruud 20:24, 14 April 2011 (UTC)

Please stay. Since you were there at the time these things happened, we would be fools to ignore you. Our problem is that the principle people will always remember things from a personal viewpoint and the temptation to introduce bias into the the WP article is always present. I'm assuming good faith on your part but many other editors on WP don't act in good faith, so we have to remain vigilant. Since those of us who were not there don't know the truth first hand, we have to rely on multiple testimonies and try to sift through them as best we can. Solutions to the potential bias problem: 1) make your edits with references and other editors will make judgements according to those references. or 2) make suggestions on this talk page (preferably with references) and other editors will make a similar judgement. It's well known that WP articles contain many mistakes but the hope is that by providing references (which you are doing) we provide a way of checking the truth of what is in the article and that we will eventually converge on the truth.

Reading your changes about Viehe again, I can see that you are trying to say that he invented a form of logic gate using magnetic cores and that he wasn't trying to invent memory. However, it is easy to read those same sentences as though you are trying put him down. Perhaps a slight rewording along the lines that Viehe invented logic gates based on magnetic cores and that Forrester further refined them into memory. That way, both parties are given credit for their respective parts.  Stepho  (talk) 21:44, 14 April 2011 (UTC)

The Viehe issue can be best resolved by separating the two uses of core: for memory and for doing logic. See the SRI site I gave for some of the impressive magnetic logic systems. Also read Viehe and Wang patents about intent. I have no idea how big the magnetics logic industry got or how many and what systems or who built with them. We have the opportunity to make the history right and credit those who did this impressive work. While I again, refer to the title of the entry that should be changed or as a minimum, the new section about magnetic cores for logic design could grow as we get the work and systems. Thuse, a new section on the The Use of Magnetic Cores for Building Digital Systems (c1950?-1960?) would be a great addition AND it could end with a question: Did any of Viehe's or Wang's work on magnetic cores for creating magnetic logic system have any impact on Forrester's co-incident current core memory invention? Note, this is why I would like Forrester's email to me to somehow get entered. I can get a letter or ask him if that quote has been printed. Also, it would be his recollection and we all agree with 60 year old recollections are suspect. Mine are useless here because I didn't do the work. Forrester's are important and left to the reader to believe or not. Bill Papian statement that they, along with others, were all looking at cores. I will refrain from opening up the Rajchman and IBM cans of worms re. their claim on the Core Memory Invention since we have enough worms now. Once we separate the two issues, we could add a few more players who got into the controversy that ended with the awarding of $13M for the Forrester patent. There is more material in the IEEE Annals and other places, but I don' think more space is warranted to go down to the next level.

Stating that Forrester refined Viehe is completely untrue. If you read Forrester's account, he was looking for the right element as an intersection of x,y,z array first attempting gas discharge, and maybe capacitors. The two efforts are completely unrelated except they both used properties of magnetic cores... a ring counter is a 1D structure and like Wang with no way to scale to store an array of bits. Neither were even 2D, and the Walker patent that was cited because it was 2D is another red herring even though cores were at the x-y intersection, they served as transformers to carry AC or signals for telephony.Cgordonbell (talk) 00:01, 15 April 2011 (UTC)

I stand corrected (re my refined comment above). Good thing somebody is checking my work.  Stepho  (talk) 04:51, 15 April 2011 (UTC)

Please do not take any of this personally. It is not intended as an attack on your integrity. Your reaction is fairly normal but sadly, I still haven't seen any way of raising potential CoI issues so that the point is made robustly but without any attack being construed, intentional or not. As we have both noted you are not directly involved here, but as a personal acquaintance with people that are that is enough to raise potential problems in and of itself. This does not suppose an intentional distortion of fact, simply that anyone would naturally wish their friends portrayed in a positive light. No-one is doubting that you have a lot to potentially offer this article and being put off by this would represent a great loss to the project, but extreme caution needs to be exercised to ensure absolutely that the article retains its integrity. That is ultimately our over-riding interest.

It is important also to recognise Wikipedia's policies and indeed weaknesses. One fundamental weakness is that experts are not and indeed cannot be recognised in respect of their personal edits here. Identities are not confirmed and ultimately anyone can claim to be anyone. I have no doubt that you are who you say you are, but those policies stand and indeed have to stand: otherwise anyone can assert anything they like with a simple "I am _____" and the project loses all credibility at a stroke. Instead we need published sources for material that the next reader or editor can verify for themselves.

Personal testimony and personal emails do not satisfy that criterion, and have to be challenged to protect the project as a whole. Aside from the identity problem (in the general rather than the specific case) memories of events 60 years ago can be fallible, and even those directly involved in a project may not have been in a position to witness any specific event, gain a perspective of the project as a whole, or an intimate perspective as to what others were doing at the time. I've seen this myself with the project my third year undergrad project was a small part of: I've read accounts of it where at times I think "that isn't right" but I also recognise that I was not privy to everything that went on.

As for the Viehe work, this was fundamentally different to coincident current memory. However, from personal memory he did cite ring counters as an example: not huge, and not random-access, but still a magnetic core memory. I don't have references to hand but have found an index to what I believe to be the relevant paper - obtaining it is likely to take weeks though. It may have been much of a dead end in terms of a primary store but a blanket assertion that it has "nothing to do with the use of core memory to store information" is distorting: that is the whole point of a ring counter after all.

I agree with you regarding the comment about Wang getting the patent behind Woo's back. That should be cited if it is true at all, and if as I suspect it can't it should be snipped with extreme prejudice. Crispmuncher (talk) 22:53, 14 April 2011 (UTC)

Dear Rudd, Crispmuncher, and Stepho, Thank you for restoring and correcting my additions. Hopefully the Woo comment can be deleted or kept if a citation exists. I still would love to propose this section. If any of you feel this way, please insert it perhaps at the end so that it can be more fully developed.

The Use of Magnetic Cores for Building Digital Systems (c1950?-1960?) Viehle appears to be the first to describe the use of magnetic core transformers for doing logic design. By 1961, magnetic core logic systems included "a control system for the Canadian National Railroad Hump Yard in Toronto because semiconductors could not withstand lightning surges. They controlled a portion of the New York subway lines to assure safe operation against electrical transients." SRI also stated "Crane began the work the mid-1950s at RCA Laboratories (now SRI International Sarnoff) and continued after he joined SRI in 1956. He introduced the basic all-magnetic logic approach at the Fall Joint Computer Conference in 1959. In 1961, the SRI magnetics group demonstrated an Air Force-funded multiaperture logic system that was the world's first, and only, all-magnetic computer." Companies included AMP who commericalized the SRI technology.

BTW: Hew Crane died a few years ago and unfortunately only a rambling audio tape is available as he had Alzheimer's. The SRI project had several great contributors including Charlie Rosen. These guys were all contemporaries of Doug Englebardt. Cgordonbell (talk) 07:05, 15 April 2011 (UTC)