Visual Instruction Set: Difference between revisions
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== Differences vs x86 == |
== Differences vs x86 == |
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VIS is not an instruction toolkit like [[Intel]]'s MMX and SSE. MMX has only 8 registers shared with the [[Floating-point unit|FPU]] stack, while SPARC processors have 32 registers, also aliased to the double-precision (64-bit) floating point registers. |
VIS is not an instruction toolkit like [[Intel]]'s MMX and SSE. MMX has only 8 registers shared with the [[Floating-point unit|FPU]] stack, while SPARC processors have 32 registers, also aliased to the double-precision (64-bit) floating point registers. |
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Revision as of 13:31, 28 November 2017
Visual Instruction Set, or VIS, is a SIMD instruction set extension for SPARC V9 microprocessors developed by Sun Microsystems. There are five versions of VIS: VIS 1, VIS 2, VIS 2+, VIS 3 and VIS 4.[1]
History
VIS 1 was introduced in 1994 and was first implemented by Sun in their UltraSPARC microprocessor (1995) and by Fujitsu in their SPARC64 GP microprocessors (2000).
VIS 2 was first implemented by the UltraSPARC III. All subsequent UltraSPARC and SPARC64 microprocessors implement the instruction set.
VIS 3 was first implemented in the SPARC T4 microprocessor.
VIS 4 was first implemented in the SPARC M7 microprocessor.
Differences vs x86
![]() | This article's factual accuracy is disputed. |
VIS is not an instruction toolkit like Intel's MMX and SSE. MMX has only 8 registers shared with the FPU stack, while SPARC processors have 32 registers, also aliased to the double-precision (64-bit) floating point registers.
As with the SIMD instruction set extensions on other RISC processors, VIS strictly conforms to the main principle of RISC: keep the instruction set concise and efficient.
This design is very different from comparable extensions on CISC processors, such as MMX, SSE, SSE2, SSE3, SSE4, 3DNow!.
Sometimes, programmers must use several VIS instructions to accomplish an operation that can be done with only one MMX or SSE instruction, but it should be kept in mind that fewer instructions do not automatically result in better performance.
Functionality
VIS re-uses existing SPARC V9 64-bit floating point registers to hold multiple 8, 16, or 32-bit integer values. In this respect, VIS is more similar to the design of MMX than other SIMD architectures such as SSE/SSE2/AltiVec.
VIS includes a number of operations primarily for graphics support, so most of them are only for integers. These include 3D to 2D conversion, edge processing and pixel distance.
There are four ways to use VIS in code:
- The GCC -mvis option
- Use inline assembly
- Use inline template in VSDK, similar to compiler intrinsics, which have C function like interfaces
- Use the mediaLib multimedia library, which has C function interfaces. It uses VIS on SPARC platforms (and MMX/SSE/SSE2 on x86/x64 platforms) to accelerate multimedia application execution
References
- ^ Liang He; Harlan McGhan (May 2005). "MT mediaLib for Chip MultiThreaded (CMT) Processors" (PDF). Sun Microsystems, Inc. Archived from the original (PDF) on December 30, 2006. Retrieved 2007-12-03.
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- Gwennap, Linley (5 December 1995). "UltraSparc Adds Multimedia Instructions". Microprocessor Report.
- Tremblay, Marc et al. (August 1996). "VIS Speeds New Media Processing". IEEE Micro.