NAND logic: Revision history

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curprev 15:2115:21, 17 January 2024‎ Jc3s5h talk contribs‎ 11,400 bytes +584‎ Undid revision 1196367897 by 2601:3C2:8200:F4A0:28EE:56E4:CC0E:8732 (talk). Article was correct and edit summary misquoted article. undo Tag: Undo
curprev 06:1406:14, 17 January 2024‎ 2601:3c2:8200:f4a0:28ee:56e4:cc0e:8732 talk‎ 10,816 bytes −584‎ Removed section asserting that “a NAND gate is an inverted OR,” and used the assertion to construct a non-working alternative NAND gate diagram for an XOR gate. undo Tags: Reverted Mobile edit Mobile app edit iOS app edit

curprev 16:0816:08, 21 December 2023‎ Semleon talk contribs‎ 11,400 bytes +76‎ →‎MUX: added diagram to demonstrate MUX gate using NAND construction undo Tag: Visual edit

curprev 06:4006:40, 20 February 2023‎ Liu1126 talk contribs‎ 11,320 bytes +61‎ Adding local short description: "Logic constructed only from NAND gates", overriding Wikidata description "logic constructed only from NAND gates" undo Tag: Shortdesc helper

curprev 20:0120:01, 14 August 2022‎ Wtshymanski talk contribs‎ 11,259 bytes −31‎ stale tag, 3 refs undo

curprev 15:2015:20, 3 August 2022‎ Xerxes314 talk contribs‎ 11,290 bytes −601‎ revert all changes by 37.132.91.11 and partial fixes by subsequent editors undo

curprev 06:4006:40, 1 August 2022‎ 69.242.232.191 talk‎ 11,891 bytes −93‎ The article incorrectly states that the minimal version of the XOR construction from NAND gates uses eleven gates, when it clearly uses four gates. Furthermore, the sentence about construction is a non-sequitur. undo

curprev 17:2417:24, 26 July 2022‎ 2003:ee:e71b:bf03:65df:5a84:2a72:36cd talk‎ 11,984 bytes −1‎ →‎OR: wrong visualization for OR. shows the same image as AND undo