SPARC T5
| General information | |
|---|---|
| Launched | 2012 |
| Performance | |
| Max. CPU clock rate | 3.6 GHz to 3.6 GHz |
| Cache | |
| L1 cache | 8×16+16 kB |
| L2 cache | 8×128 kB |
| L3 cache | 8 MB |
| Architecture and classification | |
| Technology node | 28 nm |
| Instruction set | SPARC V9 |
| Physical specifications | |
| Cores |
|
| History | |
| Predecessor(s) | SPARC T4 |
The SPARC T5 is a SPARC multicore microprocessor introduced in 2012 by Oracle Corporation. The processor is designed to offer high multithreaded performance (8 threads per core, 16 cores per chip), as well as high single threaded performance from the same chip.
History and design
References
Sources
Oracle's SPARC T5-2, SPARC T5-4, SPARC T5-8