Network interface controller
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Motherboard via one of:
Network via one of:
up to 160 Gbit/s
A network interface controller (NIC, also known as a network interface card, network adapter, LAN adapter, and by similar terms) is a computer hardware component that connects a computer to a computer network.
Early network interface controllers were commonly implemented on expansion cards that plugged into a computer bus; the low cost and ubiquity of the Ethernet standard means that most newer computers have a network interface built into the motherboard.
The network controller implements the electronic circuitry required to communicate using a specific physical layer and data link layer standard such as Ethernet, Wi-Fi or Token Ring. This provides a base for a full network protocol stack, allowing communication among small groups of computers on the same LAN and large-scale network communications through routable protocols, such as IP.
Although other network technologies exist (e.g. token ring), Ethernet has achieved near-ubiquity since the mid-1990s.
Every network controller for an IEEE 802 network such as Ethernet, Wi-Fi, or Token Ring, and every FDDI network controller, has a unique 48-bit serial number called a MAC address, which is stored in read-only memory. Every computer on an Ethernet network must have at least one controller. Normally it is safe to assume that no two network controllers will share the same address, because controller vendors purchase blocks of addresses from the Institute of Electrical and Electronics Engineers (IEEE) and assign a unique address to each controller at the time of manufacture.
The NIC allows computers to communicate over a computer network. It is both an OSI layer 1 (physical layer) and layer 2 (data link layer) device, as it provides physical access to a networking medium and, for IEEE 802 networks and FDDI, provides a low-level addressing system through the use of MAC addresses. It allows users to connect to each other either by using cables or wirelessly.
Whereas network controllers used to operate on expansion cards that plugged into a computer bus, the low cost and ubiquity of the Ethernet standard means that most new computers have a network interface built into the motherboard. Newer server motherboards may even have dual network interfaces built-in. The Ethernet capabilities are either integrated into the motherboard chipset or implemented via a low-cost dedicated Ethernet chip, connected through the PCI (or the newer PCI Express) bus. A separate network card is not required unless additional interfaces are needed or some other type of network is used.
The NIC may use one or more of two techniques to indicate the availability of packets to transfer:
- Polling is where the CPU examines the status of the peripheral under program control;
- Interrupt-driven I/O is where the peripheral alerts the CPU that it is ready to transfer data;
and may use one or more of two techniques to transfer packet data:
- Programmed input/output is where the CPU moves the data to or from the designated peripheral to memory;
- Direct memory access is where an intelligent peripheral assumes control of the system bus to access memory directly. This removes load from the CPU but requires more logic on the card. In addition, a packet buffer on the NIC may not be required and latency can be reduced.
An Ethernet network controller typically has an 8P8C socket where the network cable is connected. Older NICs also supplied BNC, or AUI connections. A few LEDs inform the user of whether the network is active, and whether or not data transmission occurs. Ethernet network controllers typically support 10 Mbit/s Ethernet, 100 Mbit/s Ethernet, and 1000 Mbit/s Ethernet varieties. Such controllers are designated 10/100/1000 - this means they can support a notional maximum transfer rate of 10, 100 or 1000 Megabits per second.
Performance and advanced functionality
Multiqueue NICs provide multiple transmit and receive queues, allowing packets received by the NIC to be assigned to one of its receive queues. Each receive queue is assigned to a separate interrupt; by routing each of those interrupts to different CPUs/cores, processing of the interrupt requests triggered by the network traffic received by a single NIC can be distributed among multiple cores. This brings additional performance improvements in interrupt handling; routing of the interrupts can be performed automatically or through manual configuration of IRQ affinity. Usually, a NIC distributes incoming traffic between the receive queues using a hash function.
Above described hardware-based distribution of the interrupts is referred to as receive-side scaling (RSS). Purely software implementations also exist, such as the receive packet steering (RPS) and receive flow steering (RFS).
With multiqueue NICs, additional performance improvements can be achieved by distributing outgoing traffic among different transmit queues. By assigning different transmit queues to different CPUs/cores, various operating system's internal contentions can be avoided; this approach is usually referred to as transmit packet steering (XPS).
Some products feature NIC partitioning (NPAR), which divides a single 10-gigabit Ethernet NIC into multiple discrete NICs presented to the firmware and operating system as separate PCI device functions.
Some NICs offer integrated field-programmable gate arrays (FPGAs) for user-programmable processing of network traffic before it reaches the host computer, allowing for significantly reduced latencies in time-sensitive workloads. Some companies, like Solarflare with its open-source OpenOnload network stack which runs on Linux, offer even complete low-latency TCP/IP stacks running on integrated FPGAs in combination with userspace libraries that intercept networking operations usually performed by the operating system's kernel; such an approach is usually referred to as user-level networking.
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