DDR3 SDRAM

In electronic engineering, DDR3 SDRAM or double-data-rate three synchronous dynamic random access memory is a random access memory technology used for high bandwidth storage of the working data of a computer or other digital electronic devices.

DDR3 is part of the SDRAM family of technologies and is one of the many DRAM (dynamic random access memory) implementations. DDR3 SDRAM is an improvement over its predecessor, DDR2 SDRAM.

The primary benefit of DDR3 is the ability to transfer I/O data at eight times the data rate of the memory cells it contains, thus enabling higher bus rates and higher peak rates than earlier memory technologies. However, there is no corresponding reduction in latency, which is therefore proportionally higher. In addition, the DDR3 standard allows for chip capacities of 512 megabits to 8 gigabits, effectively enabling a maximum memory module size of 16 gigabytes.

Overview

DDR3 memory provides a reduction in power consumption of 30% compared to DDR2 modules due to DDR3's 1.5 V supply voltage, compared to DDR2's 1.8 V or DDR's 2.5 V. The 1.5 V supply voltage works well with the 90 nanometer fabrication technology used in the original DDR3 chips. Some manufacturers further propose using "dual-gate" transistors to reduce leakage of current.

According to JEDEC the maximum recommended voltage is 1.575 volts and should be considered the absolute maximum when memory stability is the foremost consideration, such as in servers or other mission critical devices. In addition, JEDEC states that memory modules must withstand up to 1.975 volts before incurring permanent damage, although they are not required to function correctly at that level.

The main benefit of DDR3 comes from the higher bandwidth made possible by DDR3's 8 bit deep prefetch buffer, in contrast to DDR2's 4 bit prefetch buffer or DDR's 2 bit buffer.

DDR3 modules can transfer data at a rate of 800–1600 MHz using both rising and falling edges of a 400–800 MHz I/O clock. In comparison, DDR2's current range of data transfer rates is 400–800 MHz using a 200–400 MHz I/O clock, and DDR's range is 200–400 MHz based on a 100–200 MHz I/O clock. High-performance graphics was an initial driver of such bandwidth requirements, where high bandwidth data transfer between framebuffers is required.

DDR3 prototypes were announced in early 2005. Products in the form of motherboards appeared on the market in June 2007 based on Intel's P35 "Bearlake" chipset with DIMMs at bandwidths up to DDR3-1600 (PC3-12800). The Intel Core i7, released in November 2008, connects directly to memory rather than via a chipset. The Core i7 only supports DDR3. AMD's roadmap indicates their AM3 socket processors, with DDR3 support, will be available in January 2009.

DDR3 DIMMs have 240 pins, the same number as DDR2, and are the same size, but are electrically incompatible and have a different key notch location. DDR3 SO-DIMMs have 204 pins.

GDDR3 memory, having a similar name but being from an entirely dissimilar technology, has been in use for high-end graphic cards by companies such as NVIDIA and ATI Technologies. GDDR3 has sometimes been incorrectly referred to as "DDR3".

Latencies

While the typical latencies for a JEDEC DDR2 device were 5-5-5-15, the standard latencies for the JEDEC DDR3 devices are 7-7-7-20 for DDR3-1066 and 7-7-7-24 for DDR3-1333.

DDR3 latencies are numerically higher because the clock cycles by which they are measured are shorter; the actual time interval is generally lower than DDR2 latencies.

As with earlier memory generations, faster DDR3 memory became available after the release of the initial versions. DDR3-2000 memory with 9-9-9-28 latency was available in time to coincide with the Intel Core i7 release. CAS latency of 9 at 2000Mhz is 36ns, while CAS latency of 7 at 1333Mhz is 42ns.

Extensions

Intel Corporation officially introduced the eXtended Memory Profile (XMP) Specification on March 23rd, 2007 to enable enthusiast performance extensions to the traditional JEDEC SPD specifications for DDR3 SDRAM.

Specification Standards

Chips and modules

Standard name	Memory clock	Cycle time	I/O Bus clock	Data transfers per second	Module name	Peak transfer rate
DDR3-800	100 MHz	10 ns	400 MHz	800 Million	PC3-6400	6400 MB/s
DDR3-1066	133 MHz	7.5 ns	533 MHz	1066 Million	PC3-8500	8533 MB/s
DDR3-1333	166 MHz	6 ns	667 MHz	1333 Million	PC3-10600	10667 MB/s[1]
DDR3-1600	200 MHz	5 ns	800 MHz	1600 Million	PC3-12800	12800 MB/s
DDR3-2000	250 MHz	4 ns	1000 MHz	2000 Million	PC3-16000	16000 MB/s

Features

DDR3 SDRAM Components:

• Introduction of asynchronous RESET pin
• Support of system level flight time compensation
• On-DIMM mirror friendly DRAM pin out
• Introduction of CWL (CAS Write Latency) per clock bin
• On-die I/O calibration engine
• READ and WRITE calibration

DDR3 Modules:

• Fly-by command/address/control bus with on-DIMM termination
• High precision calibration resistors
• Are not backwards compatible-wrongly inserting a DDR3 module into a DDR2 socket can damage the DIMM and/or the motherboard[2]

Advantages compared to DDR2

• Higher bandwidth performance, effectively up to 1600 MHz
• Improved latencies as measured in nanoseconds.
• Higher performance at low power (longer battery life in laptops)
• Enhanced low power features
• Improved thermal design (cooler)

Disadvantages compared to DDR2

• Incompatible with DDR2 motherboards
• As of November 2008, costs somewhat more than equivalent DDR2 memory

See also

• DDR2 SDRAM
• Fully Buffered DIMM
• Dual channel
• List of device bandwidths

External links

• Coles, Olin (2008-05-11). "DDR3 RAM: System Memory Technology Explained". Benchmark Reviews.
• Gavrichenkov, Ilya (2007-07-09). "DDR3 SDRAM: Revolution or Evolution?". X-bit labs.
• Mahajan, Raj. "Memory Design Considerations When Migrating to DDR3 Interfaces from DDR2". MemCore Inc www.memcoreinc.com.
• Agostinelli, Gregory. "Method and Apparatus for fine tuning a memory interface". US PATENT OFFICE.
• JEDEC DDR3-Standard JESD79-3
• Compare DDR DDR2 and DDR3 article at RMRoberts.com web site