Chisel (programming language)

Constructing Hardware in a Scala Embedded Language (Chisel)

Developer	University of California, Berkeley
Implementation language	Scala
Website	www.chisel-lang.org

The Constructing Hardware in a Scala Embedded Language (Chisel) is an open-source hardware description language (HDL) used to describe digital circuits at the register-transfer level. Chisel is based on Scala as an embedded DSL. Chisel inherits the object-oriented and functional aspects of Scala for describing digital hardware. Using Scala as a basis allows to describe circuit generators.

Circuits described in Chisel can be converted to a description in Verilog for synthesis and simulation.

Code Examples

A simple example describing an adder circuit and showing the organization of components in Moduls with input and output ports:

class Add extends Module {
  val io = IO(new Bundle {
    val a = Input(UInt(8.W))
    val b = Input(UInt(8.W))
    val y = Output(UInt(8.W))
  })

  io.y := io.a + io.b
}

A 32-bit register with a reset value of 0:

val reg = RegInit(0.U(32.W))

A multiplexer is part of the Chisel library:

val result = Mux(sel, a, b)

Usage

Although Chisel is not yet a mainstream hardware description language, it has been explored by several companies and institutions. The most prominent usage of Chisel is an implementation of the RISC-V instruction set, the open-source Rocket chip. Chisel is mentioned by DARPA as a technology to improve the efficiency of electronic design, where smaller design teams do larger designs. Google has used Chisel to develop a tensor processing unit for the edge.

See also

• VHDL
• Verilog
• SystemC
• SystemVerilog

External links

• Official website