Turion 64
Turion 64 is AMD's 64-bit mobile processor, intended to compete with Intel's mobile processors, initially the Pentium M and currently both the Intel Core processors. It is compatible with AMD's Socket 754 and is equipped with 512 or 1024 KiB of L2 cache, a 64-bit single channel on-die memory controller, and an 800MHz HyperTransport bus. Battery saving features, like PowerNow! (Cool'n'Quiet), are central to the marketing and usefulness of the CPU. A new socket for Turion 64 and other mobile AMD processors, known as Socket S1, is scheduled to arrive in 2006.
Model Number Methodology
The model numbers may make it hard for anyone to compare one Turion with another Turion, or even an Athlon 64. The model name is two letters followed by two numbers. The first two numbers together designate a processor class, while the digits represent a PR rating. The closer the second letter is to Z, the greater it is designed for mobility as measured by power consumption. Take for instance, an MT-30 and an ML-34. Since the T in the MT-30 is closer to Z than the L in ML-34, it means the MT-30 consumes less power, and therefore, more mobility, than the ML-34. But since 34 is greater than 30, the ML-34 is faster than the MT-30.
AMD Turion 64 X2
The AMD Turion 64 X2 is to be the dual core version of the Turion processor to compete with the Intel Core and later the Intel Core 2 processor lines. The Turion 64 X2s were launched May 17, 2006. These processors use Socket S1, and feature DDR2 memory. They also include more power-saving features.
AMD Turion 64 X2 will first appear on IBM's 90nm Silicon on insulator (SOI) process, but will migrate to 65nm, likely with Silicon-Germanium (SiGe) stressed process which was recently achieved through the combined effort of IBM and AMD, with 40% improvement over comparable 65nm processes.
Cores
Lancaster (90 nm SOI)
- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 512 or 1024 KiB, fullspeed
- MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit
- Socket 754, HyperTransport (800 MHz, HT800)
- VCore: 1.00V - 1.45V
- Power consumption (TDP): 25/35 Watt max
- First release: March 10, 2005
- Clock rate: 1600, 1800, 2000, 2200, 2400 MHz
- 25W TDP:
- 35W TDP:
- ML-28: 1600 MHz (512 KiB L2-Cache)
- ML-30: 1600 MHz (1024 KiB L2-Cache)
- ML-32: 1800 MHz (512 KiB L2-Cache)
- ML-34: 1800 MHz (1024 KiB L2-Cache)
- ML-37: 2000 MHz (1024 KiB L2-Cache)
- ML-40: 2200 MHz (1024 KiB L2-Cache)
- ML-42: 2400 MHz (512 KiB L2-Cache)
- ML-44: 2400 MHz (1024 KiB L2-Cache)
Taylor (90 nm SOI)
- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 256 or 512 KiB per core, fullspeed
- MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit
- Socket S1, HyperTransport (800 MHz, HT800)
- Power consumption (TDP): 31, 33, 35 Watt max
- First release: May 17, 2006
- Clock rate: 1600, 1800, 2000 MHz
See also
References
- Reuters news report on the announcement of the chips
- Physorg report on the chip becoming available
- PCworld Turion based notebooks review
- Turion64 Inside Story from Mobility Guru
- Acer Aspire 5020 Series Review from www.notebookreview.com
- Detailed review at www.anandtech.com
- Detailed review at www.gamepc.com by Chris Connolly, 4 April 2005
- The Register : AMD, IBM "stress" silicon for 65nm process, by Tony Smith
- Silent PC Review: Turion 64 on the Desktop
- AMD Competitive Comparison
External links
Non-computing definitions
- Turion is also a winter bud of water vegetation.