Athlon

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AMD Athlon
Athlon logo.png
AMD Athlon logo used for Zen-based models.
General Info
LaunchedJune 23, 1999 (most recent version released September 6, 2018)
Common manufacturer(s)
  • AMD
Performance
Max. CPU clock rate500 MHz to 2.33 GHz
FSB speeds200 MT/s to 400 MT/s
Architecture and classification
Min. feature size0.25 μm to 0.13 μm
Instruction setx86
Physical specifications
Socket(s)
Products, models, variants
Core name(s)
  • Argon (K7)
  • Pluto/Orion (K75)
  • Thunderbird
  • Palomino (Athlon XP, MP)
  • Thoroughbred (Athlon XP, MP, XP-M)
  • Thorton/Barton (Athlon XP, MP, XP-M)
  • Corvette (Athlon 4)
History
PredecessorK6-III
SuccessorAthlon 64

Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices (AMD). The original Athlon (now called Athlon Classic) was the first seventh-generation x86 processor and was the first desktop processor to reach speeds of one gigahertz (GHz). It made its debut on June 23, 1999.[1] Over the years AMD has used the Athlon name with the 64-bit Athlon 64 architecture, the Athlon II, and Accelerated Processing Unit (APU) chips targeting the Socket AM1 desktop SoC architecture, and Socket AM4 Zen microarchitecture.[2] The modern Zen-based Athlon with a Radeon Graphics processor was introduced in 2019 as AMD’s highest-performance entry-level processor.[3][4]

Athlon comes from the Ancient Greek ἆθλον (athlon) meaning "(sport) contest", or "prize of a contest", or "place of a contest; arena".[5] With the Athlon name originally used for AMD's mid-range processors,[2] AMD currently uses Athlon for budget APUs.[2]

Brand history[edit]

K7 design and development[edit]

AMD founder (and then-CEO) Jerry Sanders aggressively pursued strategic partnerships and engineering talent in the late 1990s, to build on earlier successes in the PC market with the AMD K6 line of processors. One major partnership announced in 1998 paired AMD with semiconductor giant Motorola[6] to co-develop copper-based semiconductor technology, and resulted with the K7 project being the first commercial processor to utilize copper fabrication technology. In the announcement, Sanders referred to the partnership as creating a "virtual gorilla" that would enable AMD to compete with Intel on fabrication capacity while limiting AMD's financial outlay for new facilities.[citation needed]

The K7 design team was led by Dirk Meyer, who had worked as a lead engineer at DEC on multiple Alpha microprocessors during his employment at DEC. When DEC was sold to Compaq in 1998, the company discontinued Alpha processor development. Sanders approached many of the Alpha engineering staff as Compaq/DEC wound down their semiconductor business, and was able to bring in nearly all of the Alpha design team. The K7 engineering design team thus now consisted of both the previously acquired NexGen K6 team (already including engineers such as Vinod Dham) and the nearly complete Alpha design team.[citation needed]

Original release[edit]

In August 1999, AMD released the Athlon (K7) processor. Competitors would come to include the Pentium III.[citation needed]

By working with Motorola, AMD was able to refine copper interconnect manufacturing to the production stage about one year before Intel. The revised process permitted 180-nanometer processor production. The accompanying die-shrink resulted in lower power consumption, permitting AMD to increase Athlon clock speeds to the 1 GHz range.[7] Yields on the new process exceeded expectations, permitting AMD to deliver high speed chips in volume in March 2000.[citation needed]

The Athlon architecture also used the EV6 bus licensed from DEC as its main system bus. Intel required licensing to use the GTL+ bus used by its Slot 1 Pentium II and later processors. By licensing the EV6 bus used by the Alpha line of processors from DEC, AMD was able to develop its own chipsets and motherboards, and avoid being dependent on licensing from its direct competitor.[citation needed]

Later Athlon iterations[edit]

While the Athlon name was eventually repurposed for combined CPU/GPU processors with the GPU disabled,[2] after the 2007 launch of the Phenom processors, the name was also used for mid-range processors, positioned above Sempron.[citation needed]

After the 2007 launch of the Phenom processors, the Athlon name was also used for mid-range processors, positioned above brands such as Sempron.[8]

A USD$55 low-power Athlon 200GE with a Radeon graphics processor was introduced in September 2018, sitting under the Ryzen 3 2200G. With the release, AMD began using the Athlon brand name to refer to "low cost, high volume products," in a situation similar to both Intel's Celeron and Pentium Gold.[2] The modern Athlon 3000G was introduced in 2019, and was positioned as AMD’s highest-performance entry-level processor.[3]

Features of the original Athlon[edit]

General architecture[edit]

Athlon architecture

Like the AMD K5 and K6, the Athlon dynamically buffers internal micro-instructions at runtime resulting from parallel x86 instruction decoding. The CPU is an out-of-order design, again like previous post-5x86 AMD CPUs. The Athlon utilizes the Alpha 21264's EV6 bus architecture with double data rate (DDR) technology. This means that at 100 MHz, the Athlon front side bus actually transfers at a rate similar to a 200 MHz single data rate bus (referred to as 200 MT/s), which was superior to the method used on Intel's Pentium III (with SDR bus speeds of 100 MHz and 133 MHz).[citation needed]

AMD designed the CPU with more robust x86 instruction decoding capabilities than that of K6, to enhance its ability to keep more data in-flight at once. The Athlon's three decoders could potentially decode three x86 instructions to six microinstructions per clock, although this was somewhat unlikely in real-world use.[9] The critical branch predictor unit, essential to keeping the pipeline busy, was enhanced compared to what was on board the K6. Deeper pipelining with more stages allowed higher clock speeds to be attained.[10] Whereas the AMD K6-III+ topped out at 570 MHz due to its short pipeline, even when built on the 180 nm process, the Athlon was capable of clocking much higher.[citation needed]

AMD ended its long-time handicap with floating point x87 performance by designing a super-pipelined, out-of-order, triple-issue floating point unit.[9] Each of its three units was tailored to be able to calculate an optimal type of instructions with some redundancy. By having separate units, it was possible to operate on more than one floating point instruction at once.[9] This FPU was a huge step forward for AMD. While the K6 FPU had looked anemic compared to the Intel P6 FPU, with Athlon this was no longer the case.[11]

The 3DNow! floating point SIMD technology, again present, received some revisions and a name change to "Enhanced 3DNow!". Additions included DSP instructions and an implementation of the extended MMX subset of Intel SSE.[12]

The Athlon's CPU cache consisted of the typical two levels. Athlon was the first x86 processor with a 128 KB[13] split level 1 cache; a 2-way associative cache separated into 2×64 KB for data and instructions (a concept from Harvard architecture).[9] This cache was double the size of K6's already large 2×32 KB cache, and quadruple the size of Pentium II and III's 2×16 KB L1 cache. The initial Athlon (Slot A, later called Athlon Classic) used 512 KB of level 2 cache separate from the CPU, on the processor cartridge board, running at 50% to 33% of core speed. This was done because the 250 nm manufacturing process was too large to allow for on-die cache while maintaining cost-effective die size. Later Athlon CPUs, afforded greater transistor budgets by smaller 180 nm and 130 nm process nodes, moved to on-die L2 cache at full CPU clock speed.[citation needed]

Generations[edit]

Athlon Classic (1999)[edit]

The logo of the Athlon "Classic"
Athlon Slot A cartridge. Note heat sink and cooling fan assembly on rear side.
Logo on Slot A Athlon cartridge
An open Slot A cartridge. MPU die is in the center.

The AMD Athlon processor launched on June 23, 1999, with general availability by August '99.[1] It launched at 500 MHz and was, on average, 10% faster than the Pentium III at the same clock for Business applications, and even faster (~20%) for gaming workloads.[14]

The Athlon Classic is a cartridge-based processor, named Slot A and similar to Intel's cartridge Slot 1 used for Pentium II and Pentium III. It used the same, commonly available, physical 242 pin connector used by Intel Slot 1 processors but rotated by 180 degrees to connect the processor to the motherboard. The reversal served to make the slot keyed to prevent installation of the wrong CPU, as the Athlon and Intel processors used fundamentally different (and incompatible) signaling standards for their front-side bus. The cartridge assembly allowed the use of higher speed cache memory modules than could be put on (or reasonably bundled with) motherboards at the time. Similar to the Pentium II and the Katmai-based Pentium III, the Athlon Classic contained 512 KB of L2 cache. This high-speed SRAM cache was run at a divisor of the processor clock and was accessed via its own 64-bit bus, known as a "back-side bus" allowing the processor to both service system front side bus requests (the rest of the system) and cache accesses simultaneously versus the traditional approach of pushing everything through the front-side bus.[15]

One limitation (also afflicting the Intel Pentium III) is that SRAM cache designs at the time were incapable of keeping up with the Athlon's clock scalability, due both to manufacturing limitations of the cache chips and the difficulty of routing electrical connections to the cache chips themselves. It became increasingly difficult to reliably run an external processor cache to match the processor speeds being released—and in fact it became impossible. Thus initially the Level 2 cache ran at half of the CPU clock speed up to 700 MHz (350 MHz cache). Faster Slot-A processors had to compromise further and run at 2/5 (up to 850 MHz, 340 MHz cache) or 1/3 (up to 1 GHz, 333 MHz cache).[16] This later race to 1 GHz (1000 MHz) by AMD and Intel further exacerbated this bottleneck as ever higher speed processors demonstrated decreasing gains in overall performance—stagnant SRAM cache memory speeds choked further improvements in overall speed. This directly lead to the development of integrating L2 cache onto the processor itself and remove the dependence on external cache chips. AMD's integration of the cache onto the Athlon processor itself would later result in the Athlon Thunderbird.[citation needed]

The Slot-A Athlons were the first multiplier-locked CPUs from AMD. This was partly done to hinder CPU remarking being done by questionable resellers around the globe. AMD's older CPUs could simply be set to run at whatever clock speed the user chose on the motherboard, making it trivial to relabel a CPU and sell it as a faster grade than it was originally intended. These relabeled CPUs were not always stable, being overclocked and not tested properly, and this was damaging to AMD's reputation. Although the Athlon was multiplier locked, crafty enthusiasts eventually discovered that a connector on the PCB of the cartridge could control the multiplier. Eventually a product called the "Goldfingers device" was created that could unlock the CPU, named after the gold connector pads on the processor board that it attached to.[17]

In commercial terms, the Athlon "Classic" was an enormous success[citation needed]—not just because of its own merits, but also because Intel endured a series of major production, design, and quality control issues at this time.[citation needed] In particular, Intel's transition to the 180 nm production process, starting in late 1999 and running through to mid-2000, suffered delays.[citation needed] There was a shortage of Pentium III parts.[citation needed] In contrast, AMD enjoyed a remarkably smooth process transition and had ample supplies available,[citation needed] causing Athlon sales to become quite strong.[citation needed]

The Argon-based Athlon contained 22 million transistors and measured 184 mm2. It was fabricated by AMD in a slightly modified version of their CS44E process, a 0.25 μm complementary metal–oxide–semiconductor (CMOS) process with six levels of aluminium interconnect.[18][19] "Pluto" and "Orion" Athlons were fabricated in a 0.18 μm process.[citation needed]

Specifications
  • L1-cache: 64 + 64 KB (data + instructions)
  • L2-cache: 512 KB, external chips on CPU module with 50%, 40% or 33% of CPU speed
  • MMX, 3DNow!
  • Slot A (EV6)
  • Front-side bus: 200 MT/s (100 MHz double-pumped)
  • VCore: 1.6 V (K7), 1.6–1.8 V (K75)
  • First release: June 23, 1999 (K7), November 29, 1999 (K75)
  • Clock-rate: 500–700 MHz (K7), 550–1000 MHz (K75)

Athlon Thunderbird (2000-2001)[edit]

Athlon "Thunderbird"
Open Athlon Thunderbird slot A cartridge
AMD Athlon

The second generation Athlon, the Thunderbird, debuted on June 5, 2000. This version of the Athlon shipped in a more traditional pin-grid array (PGA) format that plugged into a socket ("Socket A") on the motherboard (it also shipped in the slot A package).[citation needed] It was sold at speeds ranging from 600 MHz to 1.4 GHz (Athlon Classics using the Slot A package could clock up to 1 GHz). The major difference, however, was cache design. Just as Intel had done when they replaced the old Katmai-based Pentium III with the much faster Coppermine-based Pentium III, AMD replaced the 512 KB external reduced-speed cache of the Athlon Classic with 256 KB of on-chip, full-speed exclusive cache. As a general rule, more cache improves performance, but faster cache improves it further still.[20]

AMD changed cache design significantly with the Thunderbird core. With the older Athlon CPUs, the CPU caching was of an inclusive design where data from the L1 is duplicated in the L2 cache. Thunderbird moved to an exclusive design where the L1 cache's contents are not duplicated in the L2. This increases total cache size of the processor and effectively makes caching behave as if there is a very large L1 cache with a slower region (the L2) and a very fast region (the L1).[21] Because of Athlon's very large L1 cache and the exclusive design, which turns the L2 cache into basically a "victim cache", the need for high L2 performance and size was lessened. AMD kept the 64-bit L2 cache data bus from the older Athlons, as a result, and allowed it to have a relatively high latency. A simpler L2 cache reduced the possibility of the L2 cache causing clock scaling and yield issues. Still, instead of the 2-way associative scheme used in older Athlons, Thunderbird did move to a more efficient 16-way associative layout.[20]

The Thunderbird was AMD's most successful product since the Am386DX-40 ten years earlier.[22] Mainboard designs had improved considerably by this time, and the initial trickle of Athlon mainboard makers had swollen to include every major manufacturer. AMD's new fab in Dresden came online, allowing further production increases, and the process technology was improved by a switch to copper interconnects. In October 2000, the Athlon "C" was introduced, raising the mainboard front-side bus speed from 100 MHz to 133 MHz (266 MT/s) and providing roughly 10% extra performance per clock over the "B" model Thunderbird.[citation needed]

Specifications
  • L1-cache: 64 + 64 KB (data + instructions)
  • L2-cache: 256 KB, full speed
  • MMX, 3DNow!
  • Slot A & Socket A (EV6)
  • Front-side bus: 100 MHz (Slot-A, B-models), 133 MHz (C-models) (200 MT/s, 266 MT/s)
  • VCore: 1.70–1.75 V
  • First release: June 5, 2000
  • Transistor count: 37 million
  • Manufacturing Process: 0.18 μm/180 nm
  • Clockrate:
    • Slot A: 650–1000 MHz
    • Socket A, 100 MHz FSB (B-models): 600–1400 MHz
    • Socket A, 133 MHz FSB (C-models): 1000–1400 MHz

Athlon XP (2000-2003)[edit]

Athlon XP logo

Palomino[edit]

Athlon XP "Palomino" 2000+

AMD released the third-generation Athlon, code-named "Palomino", on October 9, 2001 as the Athlon XP. The "XP" suffix is interpreted to mean extended performance and also as an unofficial reference to Microsoft Windows XP.[23] The Athlon XP was marketed using a PR system, which compared its relative performance to an Athlon utilizing the earlier "Thunderbird" core. Athlon XP launched at speeds between 1.33 GHz (PR1500+) and 1.53 GHz (PR1800+), giving AMD the x86 performance lead with the 1800+ model. Less than a month later, it enhanced that lead with the release of the 1600 MHz 1900+,[24] and subsequent 1.67 GHz Athlon XP 2000+ in January 2002.[citation needed]

Palomino was the first K7 core to include the full SSE instruction set from the Intel Pentium III, as well as AMD's 3DNow! Professional. It is roughly 10% faster than Thunderbird at the same clock speed, thanks in part to the new SIMD functionality and to several additional improvements. The core has enhancements to the K7's TLB architecture and added a hardware data prefetch mechanism to take better advantage of available memory bandwidth.[25] Palomino was also the first socketed Athlon officially supporting dual processing, with chips certified for that purpose branded as the Athlon MP,[26] which had different specifications.[27]

According to HardwareZone, it was possible to modify the Athlon XP to function as an MP.[28][29]

Changes in core layout also resulted in Palomino being more frugal with its electrical demands, consuming approximately 20% less power than its predecessor, and thus reducing heat output comparatively as well.[30] While the preceding Athlon "Thunderbird" was capable of clock speeds exceeding 1400 MHz, the power and thermal considerations required to reach those speeds would have made it increasingly impractical as a marketable product. Thus, Palomino's goals of lowered power consumption (and resultant heat produced) allowed AMD to increase performance within a reasonable power envelope. Palomino's design also allowed AMD to continue using the same 180 nm manufacturing process node and core voltages as Thunderbird.[citation needed]

The Palomino core debuted earlier in the mobile market—branded as Mobile Athlon 4 with the codename "Corvette". It distinctively used a ceramic interposer much like the Thunderbird instead of the organic pin grid array package used on all later Palomino processors.[25]

Specifications
  • L1-cache: 64 + 64 KB (data + instructions)
  • L2-cache: 256 KB, full speed
  • MMX, 3DNow!, SSE
  • Socket A (EV6)
  • Front-side bus: 133 MHz (266 MT/s)
  • VCore: 1.50 to 1.75 V
  • Power consumption: 68 W
  • First release: October 9, 2001
  • Clock-rate:
    • Athlon 4: 850–1400 MHz
    • Athlon XP: 1333–1733 MHz (1500+ to 2100+)
    • Athlon MP: 1000–1733 MHz

Thoroughbred[edit]

Athlon XP "Thoroughbred B" 2400+

The fourth-generation of Athlon was introduced with the Thoroughbred core, and was released on June 10, 2002 at 1.8 GHz (Athlon XP PR2200+). The "Thoroughbred" core marked AMD's first production 130 nm silicon, and gave a significant reduction in die size compared to its 180 nm predecessor.[citation needed]

There came to be two steppings (revisions) of this core commonly referred to as Tbred-A (cpuid:6 8 0) and Tbred-B (cpuid:6 8 1).[31] The initial version (later distinguished as A) was mostly a direct die shrink of the preceding Palomino core with minimal design changes, and demonstrated that AMD had successfully transitioned to a 130 nm process with production ready yields. However, while successful in reducing the production cost per processor, the unmodified Palomino design did not demonstrate the expected reduction in heat and clock scalability usually seen when a processor design is moved to a smaller process. As a result, AMD was not able to increase Thoroughbred-A clock speeds much above those of the Palomino it was meant to replace. Tbred-A was only sold in versions from 1333 MHz to 1800 MHz, and mostly only to displace existing speeds of the more production-costly Palomino from AMD's lineup.[citation needed]

Thoroughbred B

AMD thus reworked the Thoroughbred's design to better match the process node on which it was produced, creating a revised core that then became known as Thoroughbred-B. A significant aspect of this redesign was the addition of a ninth "metal layer" to the already quite complex eight-layered Thoroughbred-A. For comparison, the competing Pentium 4 Northwood only utilized six, and its successor Prescott seven layers. While the addition of more layers itself does not improve performance, it gives more flexibility for chip designers routing electrical pathways within a chip, and importantly for the Thoroughbred core, more flexibility in working around logic and power bottlenecks preventing the processor from attaining higher clock speeds. The resulting Tbred-B offered a startling improvement in headroom over the Tbred-A, which made it very popular for overclocking. The Tbred-A often struggled to reach clock speeds above 1.9 GHz, while the Tbred-B often could easily reach 2.3 GHz and above.[32]

The Thoroughbred line received an increased front side bus clock during its lifetime, from 133 MHz (266 MT/s) to 166 MHz (333 MT/s) improving the processor's ability to access memory and I/O efficiency, and resulted in improved per-clock performance. AMD shifted their PR rating scheme accordingly, making lower clock speeds equate to higher PR ratings[citation needed].

The Thoroughbred-B was the direct basis for its successor—the Tbred-B with an additional 256 KB of L2 cache (for 512 KB total) became the Barton core.[citation needed]

Specifications
  • L1-cache: 64 + 64 KB (data + instructions)
  • L2-cache: 256 KB, full speed
  • MMX, 3DNow!, SSE
  • Socket A (EV6)
  • Front-side bus: 133/166 MHz (266/333 MT/s)
  • VCore: 1.50–1.65 V
  • First release: June 10, 2002 (A), August 21, 2002 (B)
  • Clock-rate:
    • Thoroughbred "A": 1400–1800 MHz (1600+ to 2200+)
    • Thoroughbred "B": 1400–2250 MHz (1600+ to 2800+)
    • 133 MHz FSB: 1400–2133 MHz (1600+ to 2600+)
    • 166 MHz FSB: 2083–2250 MHz (2600+ to 2800+)

Barton[edit]

Athlon XP "Barton" 2500+

Fifth-generation Athlon Barton-core processors released in early 2003 with PR of 2500+, 2600+, 2800+, 3000+, and 3200+. While not operating at higher clock rates than Thoroughbred-core processors, they were marked with higher PR by featuring an increased 512 KB L2 cache; later models additionally supported an increased 200 MHz (400 MT/s) front side bus.[33] The Thorton core was a later variant of the Barton with half of the L2 cache disabled, and thus was functionally identical to the Thoroughbred-B core. The name Thorton is a portmanteau of Thoroughbred and Barton.[citation needed]

By the time of Barton's release, the Northwood-based Pentium 4 had become more than competitive with AMD's processors.[34] Unfortunately for AMD, a simple increase in size of the L2 cache to 512 KB did not have nearly the same impact as it did for Intel's Pentium 4 line, as the Athlon architecture was not nearly as cache-constrained as the Pentium 4. The Athlon's exclusive-cache architecture and shorter pipeline made it less sensitive to L2 cache size, and the Barton only saw an increase of several percent gained in per-clock performance over the Thoroughbred-B it was derived from.[33] While the increased performance was welcome, it was not sufficient to overtake the Pentium 4 line in overall performance. The PR also became somewhat inaccurate because some Barton models with lower clock rates were being given higher PR than higher-clocked Thoroughbred processors. Instances where a computational task did not benefit more from the additional cache to make up for the loss in raw clock speed created situations where a lower rated (but faster clocked) Thoroughbred would outperform a higher-rated (but lower clocked) Barton.[34]

The Barton was also used to officially introduce a higher 400 MT/s bus clock for the Socket A platform, which was used to gain some Barton models more efficiency (and increased PR). However, it was clear by this time that Intel's quad-pumped bus was scaling well above AMD's double-pumped EV6 bus. The 800 MT/s bus used by many later Pentium 4 processors was well out of the Athlon XP's reach. In order to reach the same bandwidth levels, the Athlon XP's bus would have to be clocked at levels simply unreachable.[33]

By this point, the four-year-old Athlon EV6 bus architecture had scaled to its limit. To maintain or exceed the performance of Intel's newer processors would require a significant redesign.[33] The K7 derived Athlons were replaced in September 2003 by the Athlon 64 family, which featured an on-chip memory controller and a completely new HyperTransport bus to replace EV6.[citation needed]

Specifications

Barton (130 nm)

  • L1-cache: 64 + 64 KB (data + instructions)
  • L2-cache: 512 KB, full speed
  • MMX, 3DNow!, SSE
  • Socket A (EV6)
  • Front-side bus: 166/200 MHz (333/400 MT/s)
  • VCore: 1.65 V
  • First release: February 10, 2003
  • Clockrate: 1833–2333 MHz (2500+ to 3200+)
    • 166 MHz FSB: 1833–2333 MHz (2500+ to 3200+)
    • 200 MHz FSB: 2100, 2200 MHz (3000+, 3200+)

Thorton (130 nm)

  • L1-cache: 64 + 64 KB (Data + Instructions)
  • L2-cache: 256 KB, full speed
  • MMX, 3DNow!, SSE
  • Socket A (EV6)
  • Front-side bus: 133/166/200 MHz (266/333/400 MT/s)
  • VCore: 1.50–1.65 V
  • First release: September 2003
  • Clockrate: 1667–2200 MHz (2000+ to 3100+)
    • 133 MHz FSB: 1600–2133 MHz (2000+ to 2600+)
    • 166 MHz FSB: 2083 MHz (2600+)
    • 200 MHz FSB: 2200 MHz (3100+)

Mobile Athlon XP[edit]

Athlon XP Mobile "Barton" 2400+

The Palomino core debuted in the mobile market before the PC market, where it was branded as Mobile Athlon 4 with the codename "Corvette". It distinctively used a ceramic interposer much like the Thunderbird instead of the organic pin grid array package used on all later Palomino processors.[25] In November 2001, AMD released a 1.2GHz Athlon 4 and a 950MHz Duron.[35] The Mobile Athlon 4 processors included the PowerNow! function, which controlled a laptop's "level of processor performance by dynamically adjusting its operating frequency and voltage according to the task at hand,"[36] thus extending "battery life by reducing processor power when it isn't needed by applications." Duron chips also included PowerNow![35] In 2002, AMD released a version of PowerNow! called Cool'n'Quiet, implemented on the Athlon XP but only adjusting clock speed frequency instead of voltage.[37]

In 2002 the Athlon XP-M (Mobile Athlon XP) replaced the Mobile Athlon 4 using the newer Thoroughbred core,[38] with Barton cores for full-size notebooks. The Athlon XP-M was also offered in a compact microPGA socket 563 version.[39] Mobile XPs were not multiplier-locked, making them popular with desktop overclockers.[40]

 Athlon 64 (2003-2009)[edit]

The immediate successor to the Athlon XP, the Athlon 64 is an AMD64-architecture microprocessor produced by AMD, released on September 23, 2003.[41] A number of variations, all named after cities, were released with 90 nm architecture in 2004 and 2005. Versions released in 2007 and 2009 utilized 65 nm architecture.

 Athlon 64 X2 (2005-2009)[edit]

The Athlon 64 X2 was released in 2005 as the the first native dual-core desktop CPU designed by AMD using an Athlon 64.[42] The Athlon X2 was a subsequent family of microprocessors based on the Athlon 64 X2. The original Brisbane Athlon X2 models used 65 nm architecture, and were released in 2007.[43]

 Athlon II (2009-2012)[edit]

Athlon II is a family of central processing units. Initially a dual-core version of the Athlon II, the K-10-based Regor was released in June 2009 with 45 nanometer architecture. This was followed by a single-core version, Sargas,[44] followed by the quad-core Propus, the triple-core Rana in November 2009,[45] and the Llano 32 nm version released in 2011.[46]

Zen-based Athlon (2018-present)[edit]

The Zen-based Athlon with Radeon graphics processors was launched in September 2018 with the Athlon 200GE.[47]

On November 19, 2019, AMD released the Athlon 3000G, with a higher 3.5 GHz core clock and 1100MHz graphics clock compared to the Athlon 200GE[3] also with two cores.[4] The main functional difference between the 200GE was the Athlon 3000G’s unlocked multiplier.[3]

Specifications (see Zen desktop APUs for more details[48]
Raven Ridge (14 nm), Picasso (12nm)

  • L1 Cache: 192kb (2x64KiB +2x32KiB)
  • L2-cache: 1MB (2x512KiB)
  • L3 Cache: 4MB
  • Memory: Dual-Channel DDR4-2666, 64GB Max
  • Socket AM4
  • TDP: 35W
  • First release: September 6, 2018
  • CPU Clockrate: 3.2 to 3.5 GHz
  • GPU Clockrate: 1000 to 1100 MHz

Supercomputers[edit]

A number of supercomputers have been built using Athlon chips, largely at universities. Among them:

  • In 2000, several American students claimed to have built the world's least expensive supercomputer by clustering 64 AMD Athlon chips together, also marking the first time Athlons had been clustered in a supercomputer.[49]
  • The PRESTO III, a Beowulf cluster of 78 AMD Athlon processors, was built by in 2001 the Tokyo Institute of Technology. That year it ranked 439  on the Top 500 list of supercomputers.[50]
  • In 2002, a "128-Node 256-Processor AMD Athlon Supercomputer Cluster" was installed at the Ohio Supercomputer Center at the University of Toledo.[51]
  • Rutgers University, Department of Physics & Astronomy. Machine: NOW Cluster—AMD Athlon. CPU: 512 AthlonMP (1.65 GHz). Rmax: 794 GFLOPS.[citation needed]

See also[edit]

References[edit]

This article is based on material taken from the Free On-line Dictionary of Computing prior to 1 November 2008 and incorporated under the "relicensing" terms of the GFDL, version 1.3 or later.

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  2. ^ a b c d e "AMD Announces New $55 Low-Power Processor: Athlon 200GE". AnandTech. Retrieved September 6, 2018.
  3. ^ a b c d Lucian Armasu (November 19, 2019). "AMD's Unlocked Athlon 3000G APU Starts Shipping at $49". Tom's Hardware.
  4. ^ a b Hilbert Hagedoorn (December 3, 2019). "AMD Athlon 3000G review". Guru3D.
  5. ^ ἆθλον. Liddell, Henry George; Scott, Robert; A Greek–English Lexicon at the Perseus Project.
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  8. ^ "AMD Athlon/Duron/Sempron CPU identification and OPN breakdown", amdboard.com
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