5 nanometer

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In semiconductor manufacturing, the International Technology Roadmap for Semiconductors defines the 5 nanometer (5 nm) node as the technology node following the 7 nm node.

Single transistor 7 nm scale devices were first produced by researchers in the early 2000s, and in 2003 NEC produced a 5 nm transistor.[1]

On June 5 2017, IBM revealed that they had created 5 nm silicon chips,[2] using silicon nanosheets in a Gate All Around configuration (GAAFET), a break from the usual FinFET design.[3]



The 5 nm node was once assumed by some experts to be the end of Moore's law.[4] Transistors smaller than 7 nm will experience quantum tunnelling through their logic gates.[5] Due to the costs involved in development, 5 nm is predicted to take longer to reach market than the two years estimated by Moore's Law.[4]

Beyond 7 nm, major technological advances would have to be made; possible candidates include vortex laser,[6] MOSFET-BJT dual-mode transistor,[7] 3D packaging,[8] microfluidic cooling,[9] PCMOS,[10] vacuum transistors,[11] t-rays,[12] extreme ultraviolet lithography,[13] carbon nanotube transistors,[14] silicon photonics,[15] graphene,[16] phosphorene,[17] organic semiconductors,[18] gallium arsenide,[19] indium gallium arsenide,[20] nano-patterning,[21] and reconfigurable chaos-based microchips.[22]

Technology demos[edit]

In 2002, IBM produced a 6 nm transistor.[23]

In 2003, NEC produced a 5 nm transistor.[1]

In 2006, a team of Korean researchers from the Korea Advanced Institute of Science and Technology (KAIST) and the National Nano Fab Center codeveloped a 3 nm transistor, the world's smallest nanoelectronic device based on conventional finFET technology.[24][25] It was the smallest transistor ever produced at the time.

In 2008, transistors one atom thick and ten atoms wide were made by UK researchers. They were carved from graphene, a potential alternative to silicon as the basis of future computing. Graphene is a material made from flat sheets of carbon in a honeycomb arrangement, and is a leading contender. A team at the University of Manchester, UK, used it to make some of the smallest transistors at this time: devices only 1 nm across that contain just a few carbon rings.[26]

In 2010, an Australian team announced that they fabricated a single functional transistor out of 7 atoms that measured 4 nm in length.[27][28][29]

In 2012, a team of scientists at Chungbuk National University in South Korea created a 2 nm transistor.[30]

In 2012, a single-atom transistor was fabricated using a phosphorus atom bound to a silicon surface (between two significantly larger electrodes).[31] This transistor could be said to be a 360 picometer transistor, twice the van der Waals radius of a phosphorus atom; though its covalent radius bound to silicon is likely smaller.[32] Making transistors smaller than this will require either using elements with smaller atomic radii, or using subatomic particles—like electrons or protons—as functional transistors.

In 2015, IMEC and Cadence had fabricated 5 nm test chips. The fabricated test chips are not fully functional devices but rather are to evaluate patterning of interconnect layers.[33][34]

In 2015, Intel described a lateral nanowire (or gate-all-around) FET concept for the 5-nm node.[35]

In 2016, researchers at Berkeley Lab created a transistor with a working 1-nanometer gate.[36][37] The field-effect transistor utilized MoS2 as the channel material, while a carbon nanotube was used to invert the channel. The effective channel length is approximately 1 nm. However, the drain to source pitch was much bigger, with micrometre size.


Although Intel has not yet revealed any specific plans to manufacturers or retailers, their 2009 roadmap projected an end-user release by approximately 2020.[38][39]

In early 2017, Samsung announced production of a 4 nm node by 2020 as part of its revised roadmap.[40]

5 nm process nodes[edit]

ITRS Logic Device

Ground Rules



Process name 6/5nm 5nm
Transistor Gate Pitch (nm) 32 44
Interconnect Pitch (nm) 20 32

Lower numbers are better. Transistor gate pitch is also referred to as CPP (contacted poly pitch) and interconnect pitch is also referred to as MMP (minimum metal pitch).[41][42]


  1. ^ a b NEC test-produces world's smallest transistor.
  2. ^ Sebastian, Anthony. "IBM unveils world’s first 5nm chip". Ars Technica. Retrieved 2017-06-05. 
  3. ^ IBM Figures Out How to Make 5nm Chips. June 2017
  4. ^ a b "End of Moore's Law: It's not just about physics". CNET. August 28, 2013. 
  5. ^ Pirzada, Usman. "Intel ISSCC: 14nm all figured out, 10nm is on track, Moores Law still alive and kicking". WCCF Tech. Retrieved 2015-07-02. 
  6. ^ http://www.digitaltrends.com/cool-tech/laser-vortex-moores-law/
  7. ^ R. Colin Johnson (September 14, 2016). "Transistor Trick Beats Moore: Cheaper Chip Nodes Improved". 
  8. ^ https://arstechnica.com/gadgets/2016/07/itrs-roadmap-2021-moores-law/
  9. ^ http://www.techrepublic.com/article/microfluidic-cooling-may-prevent-the-demise-of-moores-law/
  10. ^ http://www.extremetech.com/computing/129665-can-probabilistic-computing-save-moores-law
  11. ^ https://gizmodo.com/how-the-aged-vacuum-tube-could-save-moores-law-1595213474
  12. ^ https://www.siliconrepublic.com/machines/t-rays-computer-memory-mipt
  13. ^ https://www.wsj.com/articles/asml-steps-up-to-chip-industry-challenge-1475435759
  14. ^ https://gizmodo.com/carbon-nanotube-transistors-thatll-save-moores-law-are-1598486315
  15. ^ http://www.extremetech.com/computing/167866-moores-law-could-be-saved-by-super-fast-electronics-and-photonic-tech
  16. ^ https://www.theregister.co.uk/2016/07/11/scientists_grow_atomically_thick_transistors_on_graphene/
  17. ^ http://www.eetimes.com/document.asp?doc_id=1327145
  18. ^ http://www.eetimes.com/document.asp?doc_id=1327921
  19. ^ http://www.eetimes.com/document.asp?doc_id=1323892
  20. ^ http://www.computerworld.com/article/2913597/computer-processors/intel-could-prolong-moores-law-with-new-materials-transistors.html
  21. ^ http://semiengineering.com/can-nano-patterning-save-moores-law/
  22. ^ https://www.engadget.com/2016/09/26/researchers-think-chaos-theory-can-get-us-past-moores-law/
  23. ^ IBM claims world's smallest silicon transistor
  24. ^ Still Room at the Bottom.(nanometer transistor developed by Yang-kyu Choi from the Korea Advanced Institute of Science and Technology )
  25. ^ Lee, Hyunjin; et al. (2006). "Sub-5nm All-Around Gate FinFET for Ultimate Scaling". Symposium on VLSI Technology, 2006: 58–59. doi:10.1109/VLSIT.2006.1705215. 
  26. ^ Atom-thick material runs rings around silicon
  27. ^ Fuechsle, Martin; et al. (2010). "Spectroscopy of few-electron single-crystal silicon quantum dots". Nature Nanotechnology. 5 (7): 502–505. doi:10.1038/nnano.2010.95. 
  28. ^ Ng, Jansen (May 24, 2010). "Researchers Create Seven Atom Transistor, Working on Quantum Computer". Daily Tech. 
  29. ^ Beale, Bob (May 24, 2010). "Quantum leap: World's smallest transistor built with just 7 atoms". Phys.Org. 
  30. ^ https://gizmodo.com/5807151/2-nanometer-quantum-transistors-are-the-worlds-smallest
  31. ^ Fuechsle, M.; Miwa, J. A.; Mahapatra, S.; Ryu, H.; Lee, S.; Warschkow, O.; Hollenberg, L. C. L.; Klimeck, G.; Simmons, M. Y. (2012). "A single-atom transistor". Nature Nanotechnology. 7 (4): 242. PMID 22343383. doi:10.1038/nnano.2012.21. 
  32. ^ "Team designs world's smallest transistor". Retrieved 28 May 2013. 
  33. ^ "IMEC and Cadence Disclose 5nm Test Chip". Retrieved 25 Nov 2015. 
  34. ^ "The Roadmap to 5nm: Convergence of Many Solutions Needed". Retrieved 25 Nov 2015. 
  35. ^ Mark LaPedus (2016-01-20). "5nm Fab Challenges". Intel presented a paper that generated sparks and fueled speculation regarding the future direction of the leading-edge IC industry. The company described a next-generation transistor called the nanowire FET, which is a finFET turned on its side with a gate wrapped around it. Intel's nanowire FET, sometimes called a gate-all-around FET, is said to meet the device requirements for 5nm, as defined by the International Technology Roadmap for Semiconductors (ITRS). 
  36. ^ Desai, S. B.; Madhvapathy, S. R.; Sachid, A. B.; Llinas, J. P.; Wang, Q.; Ahn, G. H.; Pitner, G.; Kim, M. J.; Bokor, J.; Hu, C.; Wong, H.- S. P.; Javey, A. (2016). "MoS". Science. 354 (6308): 99–102. doi:10.1126/science.aah4698. 
  37. ^ Yang, Sarah (2016-10-06). "Smallest. Transistor. Ever. | Berkeley Lab". News Center. Retrieved 2016-10-08. 
  38. ^ "Intel Outlines Process Technology Roadmap". Xbit. 2009-08-22. Archived from the original on 2011-05-28. 
  39. ^ "インテル、32nmプロセスの順調な立ち上がりをアピール" [Intel touts steady rise of 32 nm processors] (in Japanese). PC Watch. 2009-08-21. 
  40. ^ "Samsung 4 Nanometer" [Samsung Reveals 4nm Process Generation, Full Foundry Roadmap]. Toms Hardware. 2017-05-30. 
  41. ^ "International Technology Roadmap for Semiconductors 2.0 2015 Edition Executive Report" (PDF). 
  42. ^ "5 nm lithography process". 

Preceded by
7 nm
CMOS manufacturing processes Succeeded by