IBM AS/400

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IBM AS/400
IBM AS/400e model 730
Also known asAS/400e, eServer iSeries, eServer i5, System i
TypeMidrange computer
Release dateJune 1988 (Announced)
August 1988 (Release)
DiscontinuedSep 30, 2013
Operating systemOS/400 (later known as i5/OS and IBM i)
PredecessorIBM System/38,
IBM System/36
SuccessorIBM Power Systems running IBM i
RelatedIBM System p

The IBM AS/400 (Application System/400) is a family of midrange computers from IBM announced in June 1988 and released in August 1988. It was the successor to the System/36 and System/38 platforms, and ran the OS/400 operating system. Lower-cost but more powerful than its predecessors, the AS/400 was extremely successful at launch, with an estimated 111,000 installed by the end of 1990 and annual revenue reaching $14 billion that year,[1] increasing to 250,000 systems by 1994,[2] and about 500,000 shipped by 1997.[3]

A key concept in the AS/400 platform is Technology Independent Machine Interface[a] (TIMI), a platform-independent instruction set architecture (ISA) that is translated to native machine language instructions. The platform has used this capability to change the underlying processor architecture without breaking application compatibility. Early systems were based on a 48-bit CISC instruction set architecture known as the Internal Microprogrammed Interface (IMPI), originally developed for the System/38.[4] In 1991, the company introduced a new version of the system running on a series of 64-bit PowerPC-derived CPUs, the IBM RS64 family.[5] Due to the use of TIMI, applications for the original CISC-based programs continued to run on the new systems without modification, as the TIMI code can be re-translated to the new systems' PowerPC Power ISA native machine code. The RS64 was replaced with POWER4 processors in 2001, which was followed by POWER5 and POWER6 in later upgrades.

The AS/400 went through multiple re-branding exercises, finally becoming the System i in 2006. In 2008, IBM consolidated the separate System i and System p product lines (which had mostly identical hardware by that point)[6] into a single product line named IBM Power Systems.[7][8] The name "AS/400" is sometimes used informally to refer to the IBM i operating system running on modern Power Systems hardware.[9]


Fort Knox[edit]

IBM AS/400 9404-B10 with a 5281 terminal

In the early 1980s, IBM management became concerned that IBM's large number of incompatible midrange computer systems was hurting the company's competitiveness, particularly against Digital Equipment Corporation's VAX.[10] In 1982, a project named Fort Knox commenced, which was intended to consolidate the System/36, the System/38, the IBM 8100, the Series/1 and the IBM 4300 series into a single product line based around an IBM 801-based processor codenamed Iliad, while retaining backwards compatibility with all the systems it was intended to replace.[11] A new operating system would be created for Fort Knox, but the operating systems of each platform which Fort Knox was intended to replace would also be ported to the Iliad processor to allow customers to migrate their software to the new platform.

The Fort Knox project proved to be overly ambitious, and ran into multiple delays and changes of scope. As the project advanced, the requirement to support IBM 8100 and Series/1 software was dropped.[12] When IBM's engineers attempted to port the operating systems and software of their existing platforms, they discovered that it would be impossible without making extensive changes to the Iliad processor for each individual operating system – changes which the Iliad's architects were unwilling to make.[11] The proposed solution to this was to augment Iliad with operating system-specific co-processors which provided hardware support for a single operating system. However, the amount of logic needed in each co-processor grew until the co-processors became the main processor, and the Iliad was relegated to the role of a support processor – thus failing the goal of consolidating on a single processor architecture. The Fort Knox project was ultimately cancelled in 1985.

IBM AS/400
IBM System i 570 server (as of 2006)


During the Fort Knox project, a skunkworks project was started at IBM Rochester by engineers who believed that Fort Knox's failure was inevitable. These engineers developed code which allowed System/36 applications to run on top of the System/38,[12] and when Fort Knox was cancelled, this skunkworks project evolved into an official project to replace both the System/36 and System/38 with a single new hardware platform.[13] The project became known as Silverlake (named for Silver Lake in Rochester, Minnesota) and officially began in December 1985.[14] The Silverlake hardware was essentially an evolution of the System/38 which reused some of the technology developed for the Fort Knox project.[12][15]

Silverlake's goal was to deliver a replacement for the System/36 and System/38 in as short of a timeframe as possible, as the Fort Knox project had stalled new product development at Rochester, leaving IBM without a competitive midrange system.[16] On its launch in 1986, the System/370-compatible IBM 9370 was positioned as IBM's preferred midrange platform, but failed to achieve the commercial success IBM hoped it would have.[11][17] Much like Silverlake, the 9370 also reused the co-processor developed during the Fort Knox project as its main processor, and the same SPD I/O bus which was derived from the Series/1 bus.[11]


On June 21, 1988, IBM officially announced the Silverlake system as the Application System/400 (AS/400). The announcement included more than 1,000 software packages written for it by IBM and IBM Business Partners.[18] The AS/400 operating system was named Operating System/400 (OS/400).[12]

The creators of the AS/400 originally planned to use the name System/40, but IBM had adopted a new product nomenclature around the same time, which led to the Application System/400 name.[13] Firstly, IBM began prefixing "System" in product names with words to indicate the intended use or target market of the system (e.g. Personal System/2 and Enterprise System/9000). Secondly, IBM decided to reserve one and two digit model numbers for personal systems (e.g. PS/2 and PS/55), three digit numbers for midrange systems (e.g. AS/400) and four digit numbers for mainframes (e.g. ES/9000). The reassignment of two digit model numbers from midrange systems to personal systems was to prevent the personal systems from running out of single-digit numbers for new products.

The move to PowerPC[edit]

In 1990, IBM Rochester began work to replace the AS/400's original System/38-derived 48-bit CISC processors with a 96-bit architecture known as C-RISC (Commercial RISC).[11] Rather than being a clean-slate design, C-RISC would have added RISC-style and VLIW-style instructions to the AS/400's processor, while maintaining backwards compatibility with the System/370-style Internal Microprogrammed Interface (IMPI) instruction set and the microcode used to implement it.

In 1991, at the request of IBM president Jack Kuehler, a team under the leadership of Frank Soltis delivered a proposal to adapt the 64-bit PowerPC architecture to support the needs of the AS/400 platform.[19] Their extensions to the PowerPC architecture, known as Amazon (and later as PowerPC AS), were approved by IBM management instead of the C-RISC design for development into the next AS/400 processor architecture.[20] These extensions include support for tagged memory,[21] as well as assistance for decimal arithmetic.[22]

IBM initially attempted to create a single PowerPC implementation for both AS/400 and high-end RS/6000 systems known as Belatrix.[11] The Belatrix project proved to be too ambitious, and was cancelled when it became apparent that it would not deliver on schedule. Instead, a pair of AS/400-specific processors were designed at IBM Endicott and IBM Rochester, known as Cobra (for low end systems) and Muskie (for high end systems) respectively. These became the initial implementations of the IBM RS64 processor line. The RS64 series continued to be developed as a separate product line at IBM until the POWER4 merged both the RS64 and POWER product lines together.[13]

Despite the move from IMPI to an entirely different processor architecture, the AS/400's Technology Independent Machine Interface (TIMI) mostly hid the changes from users and applications, and transparently recompiled applications for the new processor architecture.[23] The port of OS/400 to the PowerPC AS architecture required a rewrite of most of the code below the TIMI due to the use of IMPI microcode to implement significant quantities of the operating system's low level code.[13] This led to the creation of the System Licensed Internal Code (SLIC) - a new implementation of the lower levels of the operating system mostly written in C++.


The AS/400 family line was rebranded several times in the 1990s and 2000s as IBM introduced newer generations of hardware and operating system.[23]

In 1994, the AS/400 Advanced Series name was used for new models, followed by the rebranding of the product line to AS/400e (the e standing for e-business) in 1997.[13]

In 2000, eServer iSeries was introduced as part of its eServer branding initiative.[24] The eServer iSeries was built on the POWER4 processor from the RS64 processors used by previous generations, meaning that the same processors were used in both the iSeries and pSeries platforms, the latter of which ran AIX. Successive generations of iSeries and pSeries hardware converged until they were essentially the same hardware sold under different names and with different operating systems.[6]

In 2004, eServer i5 (along with OS/400 becoming i5/OS) the 5 signifying the use of POWER5 processors, was introduced, replacing the eServer iSeries brand.[25]

The final rebranding occurred in 2006, when IBM rebranded the eServer i5 to System i.[26]

In April 2008, IBM introduced the IBM Power Systems line, which was a convergence of System i and System p product lines.[7] The first Power Systems machines used the POWER6 processors; i5/OS was renamed as IBM i, in order to remove the association with POWER5 processors.[27] IBM i is sold as one of the operating system options for Power Systems (along with AIX and Linux) instead of being tied to its own hardware platform.


Although announced in 1988, the AS/400 remains IBM's most recent major architectural shift that was developed wholly internally. Since the arrival of Lou Gerstner in 1993, IBM has viewed such major internal developments as too risky. Instead, IBM now prefers to make key product strides through acquisition (e.g., the takeovers of Lotus Software and Rational Software) and to support the development of open standards, particularly Linux. After the departure of CEO John Akers in 1993, when IBM looked likely to be split up, Bill Gates commented that the only part of IBM that Microsoft would be interested in was the AS/400 division. (At the time, many of Microsoft's business and financial systems ran on the AS/400 platform, which ended around 1999 with the introduction of Windows 2000.[28][29][30])

System architecture[edit]

According to Frank Soltis, one of the architects of the AS/400 platform, the AS/400's architecture is defined by five architectural principles. Most of these principles are inherited from System/38.[31]

Technology Independence[edit]

IBM AS/400e Model 150

The high-level instruction set (called TIMI for "Technology Independent Machine Interface" by IBM), allows application programs to take advantage of advances in hardware and software without recompilation. TIMI is a virtual instruction set independent of the underlying machine instruction set of the CPU. User-mode programs contain both TIMI instructions and the machine instructions of the CPU, thus ensuring hardware independence. This is conceptually somewhat similar to the virtual machine architecture of programming environments such as Java and .NET.

Unlike some other virtual-machine architectures in which the virtual instructions are interpreted at run time, TIMI instructions are never interpreted. They constitute an intermediate compile time step and are translated into the processor's instruction set as the final compilation step. The TIMI instructions are stored within the final program object, in addition to the executable machine instructions. This is how application objects compiled on one processor family (e.g., the original CISC AS/400 48-bit processors) could be moved to a new processor (e.g., PowerPC 64-bit) without re-compilation. An application saved from the older 48-bit platform can simply be restored onto the new 64-bit platform where the operating system discards the old machine instructions and re-translates the TIMI instructions into 64-bit instructions for the new processor.

The system's instruction set defines all pointers as 128-bit. This was the original design feature of the System/38 (S/38) in the mid 1970s planning for future use of faster processors, memory and an expanded address space. The original AS/400 CISC models used the same 48-bit address space as the S/38. The address space was expanded in 1995 when the RISC PowerPC RS64 64-bit CPU processor replaced the 48-bit CISC processor.

Software integration[edit]

OS/400 (now known as IBM i) is the native operating system of the AS/400 platform, and was the sole operating system supported on the original AS/400 hardware. Many of the advanced features associated with the AS/400 are implemented in the operating system as opposed to the underlying hardware, which changed significantly throughout the life of the AS/400 platform. Features include a RDBMS (Db2 for i), a menu-driven interface, support for multiple users, block-oriented terminal support (IBM 5250), and printers.

Object-based design[edit]

Unlike the "everything is a file" principle of Unix and its derivatives, on IBM i everything is an object (with built-in persistence and garbage collection).[citation needed]

Single-level store[edit]

IBM uses a single-level store virtual memory architecture in the AS/400 platform. For 64-bit PowerPC processors, the virtual address resides in the rightmost 64 bits of a pointer while it was 48 bits in the S/38 and CISC AS/400. The 64-bit address space references main memory and disk as a single address set which is the single-level store concept.

Hardware integration[edit]

Later generations of hardware are also capable of supporting various guest operating systems, including SSP, AIX, Linux, Microsoft Windows 2000 and Windows Server 2003. While OS/400, AIX, and Linux are supported on the POWER processors on LPARs (logical partitions), Windows is supported with either single-processor internal blade servers (IXS) or externally linked multiple-processor servers (IXA and iSCSI). SSP guests were supported using emulation from OS/400 V3R6 through V4R4 using the Advanced 36 Machine facility of the operating system, a feature distinct from the System/36 Environment compatibility layer which requires System/36 software to be recompiled.



CPU Year Clock Speed Server-Models
IMPI[note 1] 1988 > 22 MHz [note 2] Current stable version: AS/400 Bxx, Cxx, Dxx, Exx, Fxx, Pxx, 100, 135, 140, 2xx, 3xx[33]
Cobra (A10) 1995 55 or 75 MHz 4xx, 5xx
Muskie (A25/A30) 1996 125 or 154 MHz 53x
Apache (RS64) (A35) 1997 125 MHz 6xx, 150
NorthStar (RS64 II) 1998 200, 255 or 262 MHz 170, 250, 7xx, 650, S40, SB1[34]
Pulsar (RS64 III) 1999 450 MHz Future release: iSeries;
System i
270, 820
IStar (RS64 III upgraded) 2000 400, 500, 540 or 600 MHz 820, 830, 840,[35] SB2, SB3[36]
SStar (RS64 IV) 2000 540, 600 or 750 MHz 270, 800, 810, 820, 830, 840
POWER4 2001 1.1 or 1.3 GHz 890
POWER4+ 2003 1.9 GHz 825, 870
POWER5 2004 1.5 or 1.9 GHz i5-520; i5-550; i5-570; i5-595
POWER5+ 2005 1.5 GHz (2005)
1.9 GHz (2005)
2.2 GHz
2.3 GHz
i5-520, i5-550, i5-515, i5-525
POWER6 2007 3.5 GHz
4.2 GHz
4.7 GHz
BladeCenter JS12, JS22
i5-570 (MMA)
M50, M25 & M15
  1. ^ There were at least two generations of IMPI processors, the second was released in 1991.[32]
  2. ^ "The processor clock cycle is 45 ns worst case."[32]

System models[edit]

Model Year CPU Group Base - CPW
B10, B20, B30, B35, B40, B45, B50, B60, B70 1988-1989 P10, P20 2,9 - 20
C04, C06, C10, C20, C25 1990 P10 3,1 - 6,1
D02, D04, D06, D10, D20, D25, D35, D45, D50, D60, D70, D80 1991 P10, P20, P30 3,8 - 56,6
E02, E04, E06, E10, E20, E25, E35, E45, E50, E60, E70, E80, E90, E95 1992 P10, P20, P30, P40 4,5 - 116,6
F02, F04, F06, F10, F20, F25, F35, F45, F50, F60, F70, F80, F90, F95, F97 1993 P05, P10, P20, P30, P40 5,5 - 177,4
P01, P02, P03 1993-1995 P05 7,3 - 16,8
150 1996 P05 10,9 - 35,0
S10, S20, S30, S40 1997 P05, P10, P20, P30, P40, P50 45,4 - 4550
SB1, SB2, SB3 1997-2000 P30, P40 1794 - 16500
10S, 100, 135, 140 1993-1995 P05, P10, P20 17,1 - 65,6
170 1998 P05, P10, P20 30 - 1090
200, 20S, 236 1994 P05, P10 7,3 - 17,1
250 2000 P05 50 - 75
270 2000 P05, P10, P20 50 - 2350
300, 30S, 310 1994 P10, P20, P30, P40 11,6 - 177,4
400, 40S, 436 1995 P05, P10 13,8 - 91,0
500, 50S, 510, 530, 53S 1995 P10, P20, P30, P40 18,7 - 650
600, 620, 640, 650 1997 P05, P10, P20, P30, P40, P50 22,7 - 4550
720 1999 P10, P20, P30 240 - 1600
730 1999 P20, P30, P40 560 - 2890
740 1999 P40, P50 3660 - 4550
800 2003 P05, P10 300 - 950
810 2003 P10, P20 750 - 2700
820 2000-2001 P05, P10, P20, P30, P40 100 - 3700
825 2003 P30 3600 - 6600
830 2000-2002 P20, P30, P40, P50 1850 - 7350
840 2000-2002 P40, P50 10000 - 20200
870 2002 P40, P50 7700 - 20000
890 2002 P50, P60 20000 - 37400
520 2004-2006 P05, P10, P20 500 - 7100
550 2004-2006 P20 3300 - 14000
570 2004-2006 P30, P40 3300 - 58500
595 2004-2006 P50, P60 24500 - 216000
515 2007 P05 3800 - 7100
525 2007 P10 3800 - 7100
570 2007 P40 16700 - 58500
MMA (9406) 2007 P30 5500 - 76900
M15 2008 P05 4300
M25 2008 P10 4300 - 8300
M50 2008 P20 4800 - 18000
MMA 2008 P30 8150 - 76900
JS12 2008 P05 7100
JS22 2008 P10 13800
JS23 2008
JS43 2008
570 (9117) 2008 P30 104800
595 (9119) 2008 P60 294700

See also[edit]

Preceded by IBM System p
2000 - 2008
eServer pSeries
eServer p5
System p5
System p
Succeeded by
Preceded by IBM AS/400
1988 - 2008
Advanced/36, AS/Entry -
eServer iSeries
eServer i5
System i5
System i


  1. ^ Upward compatible from the Machine Interface (MI) of the S/38


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External links[edit]