Programmable metallization cell

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The programmable metallization cell, or PMC, is a new form of non-volatile computer memory being developed at Arizona State University and its spinoff, Axon Technologies. PMC is one of a number of technologies that are being developed to replace the widely used flash memory, providing a combination of longer lifetimes, lower power, and better memory density. Infineon Technologies, who licensed the technology in 2004, refers to it as conductive-bridging RAM, or CBRAM. NEC has a variant called “Nanobridge” and Sony calls their version “electrolytic memory”.

The PMC technology is invented by Dr. Michael Kozicki, professor of electrical engineering at Arizona State University. In 1996, he founded Axon Technologies to commercialize it.[1]

Description[edit]

PMC is based on the physical re-location of ions within a solid electrolyte. A PMC memory cell is made of two solid metal electrodes, one relatively inert (e.g., tungsten) the other electrochemically active (e.g., silver or copper), with a thin film of the electrolyte between them. A control transistor can also be included in each cell.

When a negative bias is applied to the inert electrode, metal ions in the electrolyte, as well as some originating from the now-positive active electrode, flow in the electrolyte and are reduced (converted to atoms) by electrons from the inert electrode. After a short period of time the ions flowing into the filament form a small metallic "nanowire" between the two electrodes. The "nanowire" dramatically reduces the resistance along that path, which can be measured to indicate that the "writing" process is complete.

Actually the nanowire may not be continuous but a chain of electrodeposit islands or nanocrystals.[2] This is likely to prevail at low programming currents (less than 1 microampere) whereas higher programming current will lead to a mostly metallic conductor.

Reading the cell simply requires the control transistor to be switched on, and a small voltage applied across the cell. If the nanowire is in place in that cell, the resistance will be low, leading to higher current, and that is read as a "1". If there is no nanowire in the cell, the resistance is higher, leading to low current, and is read as a "0".

Erasing the cell is identical to writing, but uses a positive bias on the inert electrode. The metal ions will migrate away from the filament, back into the electrolyte, and eventually to the negatively charged active electrode. This breaks the nanowire and increases the resistance again.

PMC is not the only application of this basic concept, which relates to "nanoionics". Other prospective applications include dynamically reroutable electronics, optical switches, and microfluidic valves.[3]

Arizona State University was among the first to perform studies of PMC, developed by the university's Center for Applied Nanoionics. The new technology will presumably be used in commercial products. PMC technology has been licensed to Infineon (Qimonda), Micron Technology, and Adesto Technologies, and several other large semiconductor companies and OEMs have also shown interest in the new technology.[4]

CBRAM vs. RRAM[edit]

CBRAM differs from RRAM in that for CBRAM metal ions dissolve readily in the material between the two electrodes, while for RRAM, the material between the electrodes requires a high electric field causing local damage akin to dielectric breakdown, producing a trail of conducting defects (sometimes called a "filament"). Hence for CBRAM, one electrode must provide the dissolving ions, while for RRAM, a one-time "forming" step is required to generate the local damage.

Comparison[edit]

The primary form of solid-state non-volatile memory in use today is flash memory, which is finding use in most roles that used to be filled by hard drives. Flash, however, has a number of problems that have led to many efforts to introduce products to replace it.

Flash is based on the floating gate concept, essentially a modified transistor. Conventional flash transistors have three connections, the source, drain and gate. The gate is the essential component of the transistor, controlling the resistance between the source and drain, and thereby acting as a switch. In the floating gate transistor, the gate is attached to a layer that traps electrons, leaving it switched on (or off) for extended periods of time. The floating gate can be re-written by passing a large current through the emitter-collector circuit.

It is this large current that is flash's primary drawback, and for a number of reasons. For one, each application of the current physically degrades the cell, such that the cell will eventually be unwritable. Write cycles on the order of 105 to 106 are typical, limiting flash applications to roles where constant writing is not common. The current also requires an external circuit to generate, using a system known as a charge pump. The pump requires a fairly lengthy charging processes so that writing is much slower than reading; the pump also requires much more power. Flash is thus an "asymmetrical" system, much more so than conventional RAM or hard drives.

Another problem with flash is that the floating gate suffers leakage that slowly releases the charge. This is countered through the use of powerful surrounding insulators, but these require a certain physical size in order to be useful and also require a specific physical layout, which is different from the more typical CMOS layouts, which required several new fabrication techniques to be introduced. As flash scales rapidly downward in size the charge leakage increasingly becomes a problem, which has led to several predictions of flash's ultimate demise. However, massive market investment has driven development of flash at rates in excess of Moore's Law, and semiconductor fabrication plants using 30 nm processes are currently (late 2007) being brought online.

In contrast to flash, PMC writes with relatively low power and at high speed. The speed is inversely related to the power applied (to a point, there are mechanical limits), so the performance can be tuned for different roles. Additionally, the writing process is "almost infinitely reversible",[5] making PMC much more universally applicable than flash.

PMC, in theory, can scale to sizes much smaller than flash, theoretically as small as a few ion widths wide. Copper ions are about 0.75 angstroms,[6] so line widths on the order of nanometers seem possible. PMC is also much simpler in layout than flash, which should lead to simpler construction and lower costs.[5] Whether or not these advantages can be brought to market remains to be seen; the wide variety of other "flash killers" have so far always been behind the technology curve of flash's massive investment. However, as the CEO of one licensee claimed, "No other technology can deliver the orders-of-magnitude improvement in power, performance and cost that this memory can."[5]

Current status[edit]

Early experimental PMC systems were based on silver-doped germanium selenide glasses, but these materials were not able to withstand the temperatures used in standard CMOS fabs. Work then turned to silver-doped germanium sulfide electrolytes and then finally to the current copper-doped germanium sulfide electrolytes.[7]

Axon Technologies has been licensing the basic concept since its formation in 2001. The first licensee was Micron Technology, who started work with PMC in 2002.[8] Infineon followed in 2004,[9] and a number of smaller companies have since joined as well.

In 2011, Adesto Technologies allied with the French company Altis Semiconductor for a partnership in development and manufacturing of CBRAM.[10] In the same year, the two companies launched the first CBRAM product.[11] In 2013, Adesto Technologies introduced a sample CBRAM product in which a 1 megabit part is bound to replace EEPROM. Backed by this success, the company displays its ambition aiming a 70 billion dollar market.[12]

References[edit]

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