# Memristor

Memristor
Type Passive
Working principle Memristance
Invented Leon Chua (1971)
First production HP Labs (2008)
Electronic symbol

The memristor (pron.: /ˈmɛmrɨstər/; a portmanteau of "memory resistor") was originally envisioned in 1971 by circuit theorist Leon Chua as a missing non-linear passive two-terminal electrical component relating electric charge and magnetic flux linkage.[1] Leon Chua has more recently argued that the memristor definition could be generalized to cover all forms of 2-terminal non-volatile memory devices based on resistance switching effects [2] although some experimental evidence contradicts this claim since a non-passive "nanobattery" effect is observable in resistance switching memory.[3] Chua has also argued that the memristor is the oldest known circuit element with its effects predating the resistor, capacitor and inductor.[4] The memristor is currently under development by various teams including Hewlett-Packard, SK Hynix, and HRL Laboratories.

When current flows in one direction through a memristor, the electrical resistance increases; and when current flows in the opposite direction, the resistance decreases.[5] When the current is stopped, the memristor retains the last resistance that it had, and when the flow of charge starts again, the resistance of the circuit will be what it was when it was last active.[6] The memristor device described by HP is said to have a regime of operation with an approximately linear charge-resistance relationship as long as the time-integral of the current stays within certain bounds.[7]

In 2008, a team at HP Labs announced the development of a switching memristor based on a thin film of titanium dioxide.[8] These devices are being developed for application in nanoelectronic memories, computer logic, and neuromorphic computer architectures.[9] In October 2011, the same team announced the commercial availability of memristor technology within 18 months, as a replacement for Flash, SSD, DRAM and SRAM.[10] In March 2012, a team of researchers from HRL Laboratories and the University of Michigan announced the first functioning memristor array built on a CMOS chip for applications in neuromorphic computer architectures.[11]

An array of 17 purpose-built oxygen-depleted titanium dioxide memristors built at HP Labs, imaged by an atomic force microscope. The wires are about 50 nm, or 150 atoms, wide.[12] Electric current through the memristors shifts the oxygen vacancies, causing a gradual and persistent change in electrical resistance.[13]

## Background

In his 1971 paper, Chua extrapolated the conceptual symmetry between the nonlinear resistor (voltage vs. current), nonlinear capacitor (voltage vs. charge), and nonlinear inductor (magnetic flux linkage vs. current), and inferred the memristor as a similarly fundamental nonlinear circuit element linking magnetic flux linkage and charge. In contrast to a linear (or nonlinear) resistor the memristor has a dynamic relationship between current and voltage including a memory of past voltages or currents. Other scientists had already proposed dynamic memory resistors such as the memistor of Bernard Widrow but Chua attempted to introduce mathematical generality.

The resistance of a memristor depends on the integral of the input applied to the terminals (rather than on the instantaneous value of the input as in a varistor).[14] Since the element "remembers" the amount of current that has passed through it in the past, it was tagged by Chua with the name "memristor". Another way of describing a memristor is that it is any passive two-terminal circuit element that maintains a functional relationship between the time integral of current (called charge) and the time integral of voltage (often called flux, as it is related to magnetic flux). The slope of this function is called the memristance M and is similar to variable resistance.

The definition of the memristor is based solely on the fundamental circuit variables of current and voltage and their time-integrals, just like the resistor, capacitor, and inductor. Unlike those three elements however, which are allowed in linear time-invariant or LTI system theory, memristors of interest have a dynamic function with memory and may be described by any of a variety of functions of net charge. There is no such thing as a standard memristor. Instead, each device implements a particular function, wherein the integral of voltage determines the integral of current, and vice versa. A linear time-invariant memristor, with a constant value for M, is simply a conventional resistor.[1] Like other two-terminal components (e.g., resistor, capacitor, inductor), real-world devices are never purely memristors ("ideal memristor"), but will also exhibit some amount of capacitance, resistance, and inductance.

## Memristor definition and criticism

According to the original 1971 definition the memristor was considered the fourth fundamental circuit element forming a non-linear relationship between electric charge and magnetic flux linkage. In 2011 Leon Chua has argued for a broader definition so that all 2-terminal non-volatile memory devices based on resistance switching should be considered memristors.[2] Stan Williams of HP Labs has also argued that MRAM, phase change memory, and RRAM should be considered memristor technologies.[15] Some researchers have argued that biological structures such as blood[16] and skin[17] should also be considered to be memristors. Others have argued that the memory device under development by HP Labs and other forms of RRAM are not actually memristors or memristive systems but part of a broader class of variable resistance systems [18] and that a broader definition of memristor is a scientifically unjustifiable land grab to favor the memristor patents of Hewlett-Packard.[19]

Some researchers have pointed out problems with the memristor models of HP Labs. A paper by P. Meuffels and H. Schroeder published in Applied Physics A noted that one of the early memristor papers included a mistaken assumption regarding ionic conduction.[20] A paper was posted on arXiv by P. Meuffels and R. Soni discussing possible issues and problems in the realization of memristors in terms of Landauer's principle.[21] According to this paper the physics behind the concept of memristive systems like the HP memristor is in conflict with fundamentals of non-equilibrium thermodynamics. Following the dynamic state equations of such systems, one would be able to violate Landauer's principle of the minimum possible amount of energy required to change "information" states in a system.[21] Additionally, with respect to the dynamics, genuine non-volatile memristors would be unable to protect their memory states against unavoidable fluctuations.[21] [22] Hence it appears that no physical model can be proposed which would satisfy the mathematical system of equations defining non-volatile memristors/memristive systems.

Researchers from Mitre Corporation have noted that memristor models based on the assumption of linear ionic drift do not account for asymmetry between set time (high-to-low resistance switching) and reset time (low-to-high resistance switching) and do not provide ionic mobility values consistent with experimental data. Non-linear ionic drift models have been suggested to compensate for this deficiency.[23]

Martin Reynolds, an electrical engineering analyst with research outfit Gartner, has commented that Stan Williams is being sloppy in calling HP's device a memristor but that the memristor critics are being pedantic and it does not matter how HP's device works as long as it provides the ability to build devices with really high density storage.[24]

## Experimental tests for memristors

Leon Chua has suggested the following three experimental tests to determine if a device may properly be categorized as a memristor:

1. The Lissajous curve in the voltage-current plane is a pinched hysteresis loop when driven by any bipolar periodic voltage or current and under any initial conditions.

2. The area of each lobe of the pinched hysteresis loop shrinks as the frequency of the forcing signal increases.

3. As the frequency tends to infinity, the pinched hysteresis loop degenerates to a straight line through the origin, whose slope depends on the amplitude and shape of the forcing signal.

According to Chua[25] all resistive switching memories including ReRAM, MRAM, and phase change memory meet these criteria and should thus all be considered memristors. However, it is unclear whether there is sufficient evidence to support this claim since most experimental papers do not provide data for the Lissajous curves over a range of initial conditions or over a range of frequencies.

Experimental evidence shows that redox-based resistance memory (ReRAM) includes a nanobattery effect which is contrary to Chua's memristor model. This indicates that the memristor theory is either incorrect or needs to be extended for accurate ReRAM modeling. [3]

## Theory

The memristor was originally defined in terms of a non-linear functional relationship between magnetic flux linkage Φm(t) and the amount of electric charge that has flowed, q(t):[1]

$f(\mathrm \Phi_\mathrm m(t),q(t))=0$

The variable Φm ("magnetic flux linkage") is generalized from the circuit characteristic of an inductor. It does not represent a magnetic field here, and its physical meaning is discussed below. The symbol Φm may simply be regarded as the integral of voltage over time.[26]

In the relationship between Φm and q, the derivative of one with respect to the other depends on the value of one or the other, and so each memristor is characterized by its memristance function describing the charge-dependent rate of change of flux with charge.

$M(q)=\frac{\mathrm d\Phi_m}{\mathrm dq}$

Substituting that the flux is simply the time integral of the voltage, and charge is the time integral of current, we may write the more convenient form

$M(q(t))=\cfrac{\mathrm d\Phi_m/\mathrm dt}{\mathrm dq/\mathrm dt}=\frac{V(t)}{I(t)}$

To relate the memristor to the resistor, capacitor, and inductor, it is helpful to isolate the term M(q), which characterizes the device, and write it as a differential equation.

Device Characteristic property (units) Differential equation
Resistor Resistance (V per A, or Ohm, Ω) R = dV / dI
Capacitor Capacitance (C per V, or Farads) C = dq / dV
Inductor Inductance (Wb per A, or Henrys) L = dΦm / dI
Memristor Memristance (Wb per C, or Ohm) M = dΦm / dq

Note that the above table covers all meaningful ratios of differentials of I, Q, Φm, and V. No device can relate dI to dq, or m to dV, because I is the derivative of Q and Φm is the integral of V.

It can be inferred from this that memristance is simply charge-dependent resistance. If M(q(t)) is a constant, then we obtain Ohm's Law R(t) = V(t)/ I(t). If M(q(t)) is nontrivial, however, the equation is not equivalent because q(t) and M(q(t)) will vary with time. Solving for voltage as a function of time we obtain

$V(t) =\ M(q(t)) I(t)$

This equation reveals that memristance defines a linear relationship between current and voltage, as long as M does not vary with charge. Of course, nonzero current implies time varying charge. Alternating current, however, may reveal the linear dependence in circuit operation by inducing a measurable voltage without net charge movement—as long as the maximum change in q does not cause much change in M.

Furthermore, the memristor is static if no current is applied. If I(t) = 0, we find V(t) = 0 and M(t) is constant. This is the essence of the memory effect.

The power consumption characteristic recalls that of a resistor, I2R.

$P(t) =\ I(t)V(t) =\ I^2(t) M(q(t))$

As long as M(q(t)) varies little, such as under alternating current, the memristor will appear as a constant resistor. If M(q(t)) increases rapidly, however, current and power consumption will quickly stop.

M(q) is physically restricted to be positive for all values of q (assuming the device is passive and does not become superconductive at some q). A negative value would mean that it would perpetually supply energy when operated with alternating current.

In 2008 researchers from HP Labs introduced a model for a memristance function based on thin films of titanium dioxide.[14] For RON<<ROFF the memristance function was determined to be

$M(q(t)) = R_\mathrm{OFF} \cdot \left(1-\frac{\mu_{v}R_\mathrm{ON}}{D^2} q(t)\right)$

where ROFF represents the high resistance state, RON represents the low resistance state, μv represents the mobility of dopants in the thin film, and D represents the film thickness. The paper from the HP Labs group noted that "window functions" were necessary to compensate for differences between experimental measurements and their memristor model due to nonlinear ionic drift and boundary effects.

### Operation as a switch

For some memristors, applied current or voltage will cause a great change in resistance. Such devices may be characterized as switches by investigating the time and energy that must be spent in order to achieve a desired change in resistance. Here we will assume that the applied voltage remains constant and solve for the energy dissipation during a single switching event. For a memristor to switch from Ron to Roff in time Ton to Toff, the charge must change by ΔQ = QonQoff.

$E_{\mathrm{switch}} =\ V^2\int_{T_\mathrm{off}}^{T_\mathrm{on}} \frac{\mathrm dt}{M(q(t))} =\ V^2\int_{Q_\mathrm{off}}^{Q_\mathrm{on}}\frac{\mathrm dq}{I(q)M(q)} =\ V^2\int_{Q_\mathrm{off}}^{Q_\mathrm{on}}\frac{\mathrm dq}{V(q)} =\ V\Delta Q$

To arrive at the final expression, substitute V=I(q)M(q), and then ∫dq/V = ∆Q/V for constant V. This power characteristic differs fundamentally from that of a metal oxide semiconductor transistor, which is a capacitor-based device. Unlike the transistor, the final state of the memristor in terms of charge does not depend on bias voltage.

The type of memristor described by Williams ceases to be ideal after switching over its entire resistance range and enters hysteresis, also called the "hard-switching regime".[14] Another kind of switch would have a cyclic M(q) so that each off-on event would be followed by an on-off event under constant bias. Such a device would act as a memristor under all conditions, but would be less practical.

### Memristive systems

The memristor was generalized to memristive systems in a 1976 paper by Leon Chua.[27] Whereas a memristor has mathematically scalar state, a system has vector state. The number of state variables is independent of the number of terminals.

In this paper, Chua applied this model to empirically observed phenomena, including the Hodgkin-Huxley model of the axon and a thermistor at constant ambient temperature. He also described memristive systems in terms of energy storage and easily observed electrical characteristics. These characteristics might match resistive random-access memory relating the theory to active areas of research.

In the more general concept of an n-th order memristive system the defining equations are

$y(t)=g(\textbf{x},u,t)u(t),$
$\dot{\textbf{x}}=f(\textbf{x},u,t)$

where u(t) is an input signal, y(t) is an output signal, the vector x represents a set of n state variables describing the device, and g and f are continuous functions. For a current-controlled memristive system the signal u(t) represents the current signal, i(t) and the signal y(t) represents the voltage signal v(t). For a voltage-controlled memristive system the signal u(t) represents the voltage signal v(t) and the signal y(t) represents the current signal i(t).

The pure memristor is a particular case of these equations, namely when x depends only on charge (x=q) and since the charge is related to the current via the time derivative dq/dt=i(t). Thus for pure memristors f (i.e. the rate of change of the state) must be equal or proportional to the current i(t) .

### Pinched hysteresis

Example of pinched hysteresis curve, V versus I

One of the resulting properties of memristors and memristive systems is the existence of a pinched hysteresis effect. [28] For a current-controlled memristive system, the input u(t) is the current i(t), the output y(t) is the voltage v(t), and the slope of the curve represents the electrical resistance. The change in slope of the pinched hysteresis curves demonstrates a switching between different resistance states which is a phenomenon central to ReRAM and other forms of two-terminal resistance memory. At high frequencies, memristive theory predicts the pinched hysteresis effect will degenerate, resulting in a straight line representative of a linear resistor. It has been proven that there are some types of non-crossing pinched hysteresis curves (denoted Type-II) that can not be described by memristors.[29]

### Extended memristive systems

Some researchers have raised the question of the scientific legitimacy of HP's memristor models in explaining the behavior of ReRAM.[18][19] and have suggested extended memristive models to remedy the deficiencies of the memristor model.[3]

One example[30] attempts to extend the memristive systems framework by including dynamic systems incorporating higher-order derivatives of the input signal u(t) as a series expansion

$y(t)=g_0(\textbf{x},u)u(t)+ g_1(\textbf{x},u){\operatorname{d}^2u\over\operatorname{d}t^2}+ g_2(\textbf{x},u){\operatorname{d}^4u\over\operatorname{d}t^4}+ ... + g_m(\textbf{x},u){\operatorname{d}^{2m}u\over\operatorname{d}t^{2m}},$
$\dot{\textbf{x}}=f(\textbf{x},u)$

where m is a positive integer, u(t) is an input signal, y(t) is an output signal, the vector x represents a set of n state variables describing the device, and the functions g and f are continuous functions. This equation produces the same zero-crossing hysteresis curves as memristive systems but with a different frequency response than that predicted by memristive systems.

Another example suggests including an offset value a to account for an observed nanobattery effect which violates the zero-crossing pinched hysteresis effect predicted by memristors and memristive systems.[3]

$y(t)=g_0(\textbf{x},u)(u(t)-a),$
$\dot{\textbf{x}}=f(\textbf{x},u)$

## Implementations

### Titanium dioxide memristor

Interest in the memristor revived when an experimental solid state version was reported by R. Stanley Williams of Hewlett Packard.[31][32][33] The article was the first to demonstrate that a solid-state device could have the characteristics of a memristor based on the behavior of nanoscale thin films. The device neither uses magnetic flux as the theoretical memristor suggested, nor stores charge as a capacitor does, but instead achieves a resistance dependent on the history of current.

Although not cited in HP's initial reports on their TiO2 memristor, the resistance switching characteristics of titanium dioxide were originally described in the 1960s.[34]

The HP device is composed of a thin (50 nm) titanium dioxide film between two 5 nm thick electrodes, one Ti, the other Pt. Initially, there are two layers to the titanium dioxide film, one of which has a slight depletion of oxygen atoms. The oxygen vacancies act as charge carriers, meaning that the depleted layer has a much lower resistance than the non-depleted layer. When an electric field is applied, the oxygen vacancies drift (see Fast ion conductor), changing the boundary between the high-resistance and low-resistance layers. Thus the resistance of the film as a whole is dependent on how much charge has been passed through it in a particular direction, which is reversible by changing the direction of current.[14] Since the HP device displays fast ion conduction at nanoscale, it is considered as a nanoionic device.[35]

Memristance is displayed only when both the doped layer and depleted layer contribute to resistance. When enough charge has passed through the memristor that the ions can no longer move, the device enters hysteresis. It ceases to integrate q=∫Idt, but rather keeps q at an upper bound and M fixed, thus acting as a constant resistor until current is reversed.

Memory applications of thin-film oxides had been an area of active investigation for some time. IBM published an article in 2000 regarding structures similar to that described by Williams.[36] Samsung has a U.S. patent for oxide-vacancy based switches similar to that described by Williams.[37] Williams also has a pending U.S. patent application related to the memristor construction.[38]

Although the HP memristor is a major discovery for electrical engineering theory, it has yet to be demonstrated in operation at practical speeds and densities. Graphs in Williams' original report show switching operation at only ~1 Hz. Although the small dimensions of the device seem to imply fast operation, the charge carriers move very slowly, with an ion mobility of 10−10 cm2/(Vs). In comparison, the highest known drift ionic mobilities occur in advanced superionic conductors, such as rubidium silver iodide with about 2×10−4 cm2/(Vs) conducting silver ions at room temperature. Electrons and holes in silicon have a mobility ~1000 cm2/(Vs), a figure which is essential to the performance of transistors. However, a relatively low bias of 1 volt was used, and the plots appear to be generated by a mathematical model rather than a laboratory experiment.[14]

In April 2010, HP labs announced that they had practical memristors working at 1 ns (~1 GHz) switching times and 3 nm by 3 nm sizes, with electron/hole mobility of 1 m/s,[39] which bodes well for the future of the technology.[40] At these densities it could easily rival the current sub-25 nm flash memory technology.

### Polymeric memristor

In 2004, Juri H. Krieger and Stuart M. Spitzer published a paper "Non-traditional, Non-volatile Memory Based on Switching and Retention Phenomena in Polymeric Thin Films"[41] at the IEEE Non-Volatile Memory Technology Symposium, describing the process of dynamic doping of polymer and inorganic dielectric-like materials in order to improve the switching characteristics and retention required to create functioning nonvolatile memory cells. Described is the use of a special passive layer between electrode and active thin films, which enhances the extraction of ions from the electrode. It is possible to use fast ion conductor as this passive layer, which allows a significant reduction of the ionic extraction field.

In July 2008, Victor Erokhin and Marco P. Fontana, in Electrochemically controlled polymeric device: a memristor (and more) found two years ago,[42] claim to have developed a polymeric memristor before the titanium dioxide memristor more recently announced.

In 2012, an article published in the IEEE Canadian Review, “Modelling Neural Plasticity with Memristors,”[43] described a proof of concept design to create neural synaptic memory circuits using organic ion based memristors. The synapse circuit demonstrated long-term potentiation for learning as well as inactivity based forgetting. Using a grid of circuits, a pattern of light was stored and later recalled. This mimics the behavior of the V1 neurons in the primary visual cortex which act as spatiotemporal filters in order to process visual signals such as edges and moving lines.

### Ferroelectric memristor

The ferroelectric memristor [44] is based on a thin ferroelectric barrier sandwiched between two metallic electrodes. Switching the polarization of the ferroelectric material by applying a positive or negative voltage across the junction can lead to large resistance variations over two orders of magnitude : ROFF >> RON (an effect called Tunnel Electro-Resistance). In general, the polarization does not switch abruptly. The reversal occurs gradually through the nucleation and growth of ferroelectric domains with opposite polarization. During this process, the resistance is neither RON or ROFF, but in between. When the voltage is cycled, the ferroelectric domain configuration evolves, allowing a fine tuning of the resistance value. The ferroelectric memristor has two main advantages : 1- ferroelectric domain dynamics can be tuned, offering a way to engineer the memristor response, 2 - the resistance variations are due to purely electronic phenomena, a good point in term of device reliability, as no deep change of the material structure is involved.

### Spin memristive systems

#### Spintronic memristor

Yiran Chen and Xiaobin Wang, researchers at disk-drive manufacturer Seagate Technology, in Bloomington, Minnesota, described three examples of possible magnetic memristors in March, 2009 in IEEE Electron Device Letters.[45] In one of the three, resistance is caused by the spin of electrons in one section of the device pointing in a different direction than those in another section, creating a "domain wall", a boundary between the two states. Electrons flowing into the device have a certain spin, which alters the magnetization state of the device. Changing the magnetization, in turn, moves the domain wall and changes the device's resistance.

This work attracted significant attention from the electronics press, including an interview by IEEE Spectrum.[46] A first experimental proof of the Spintronic Memristor based on domain wall motion by spin currents in a Magnetic Tunnel Junction was given in 2011.[47]

#### Spin-transfer torque magnetoresistance

Spin-transfer torque MRAM is a well-known device that exhibits memristive behavior. The resistance is dependent on the magnetic state of a magnetic tunnel junction, i.e., on the relative magnetization alignment of the two electrodes. This in turn can be controlled by the spin torque induced by the current flowing through the junction. However, the length of time the current flows through the junction determines the amount of current needed, i.e., the charge flowing through is the key variable.[48]

Additionally, as reported by Krzysteczko et al.,[49] MgO based magnetic tunnel junctions show memristive behavior based on the drift of oxygen vacancies within the insulating MgO layer (resistive switching). Therefore, the combination of spin-transfer torque and resistive switching leads naturally to a second-order memristive system described by the state vector x=(x1,x2), where x1 describes the magnetic state of the electrodes and x2 denotes the resistive state of the MgO barrier. Note that in this case the change of x1 is current-controlled (spin torque is due to a high current density) whereas the change of x2 is voltage-controlled (the drift of oxygen vacancies is due to high electric fields). The presence of both effects in a memristive magnetic tunnel junction led to the idea of a nanoscopic synapse-neuron system.[50]

#### Spin memristive system

A fundamentally different mechanism for memristive behavior has been proposed by Yuriy V. Pershin and Massimiliano Di Ventra in their paper "Spin memristive systems".[51] The authors show that certain types of semiconductor spintronic structures belong to a broad class of memristive systems as defined by Chua and Kang.[27] The mechanism of memristive behavior in such structures is based entirely on the electron spin degree of freedom which allows for a more convenient control than the ionic transport in nanostructures. When an external control parameter (such as voltage) is changed, the adjustment of electron spin polarization is delayed because of the diffusion and relaxation processes causing a hysteresis-type behavior. This result was anticipated in the study of spin extraction at semiconductor/ferromagnet interfaces,[52] but was not described in terms of memristive behavior. On a short time scale, these structures behave almost as an ideal memristor.[1] This result broadens the possible range of applications of semiconductor spintronics and makes a step forward in future practical applications of the concept of memristive systems.

## Potential applications

Williams' solid-state memristors can be combined into devices called crossbar latches, which could replace transistors in future computers, taking up a much smaller area.

They can also be fashioned into non-volatile solid-state memory, which would allow greater data density than hard drives with access times potentially similar to DRAM, replacing both components.[53] HP prototyped a crossbar latch memory using the devices that can fit 100 gigabits in a square centimeter,[8] and has designed a highly scalable 3D design (consisting of up to 1000 layers or 1 petabit per cm3).[54] In May 2008 HP reported that its version of the memristor is currently about one-tenth the speed of DRAM.[55] The devices' resistance would be read with alternating current so that the stored value would not be affected.[56] In May 2012 it was reported that speeds had been improved to as fast as 90 nanoseconds if not faster, approximately one hundred times faster than contemporaneous flash memory, while using one hundredth the energy.[57]

Some patents related to memristors appear to include applications in programmable logic,[58] signal processing,[59] neural networks,[60] control systems,[61] reconfigurable computing,[62] Brain-computer interfaces,[63] and RFID.[64] Memristive devices can be potentially used for stateful logic implication, allowing a replacement for CMOS-based logic computation. Several early works in this direction are reported.[65] [66]

In 2009, a simple electronic circuit[67] consisting of an LC network and a memristor was used to model experiments on adaptive behavior of unicellular organisms.[68] It was shown that the electronic circuit subjected to a train of periodic pulses learns and anticipates the next pulse to come, similarly to the behavior of slime molds Physarum polycephalum where the viscosity of channels in the cytoplasm respond to periodic changes of environment.[68] Such a learning circuit may find applications, e.g., in pattern recognition. The DARPA’s SyNAPSE project has funded HP Labs, in collaboration with the Boston University Neuromorphics Lab, to develop neuromorphic architectures which may be based on memristive systems. In 2010, Massimiliano Versace and Ben Chandler co-wrote an article [69] describing the MoNETA (Modular Neural Exploring Traveling Agent) model. MoNETA is the first large-scale neural network model to implement whole-brain circuits to power a virtual and robotic agent compatibly with memristive hardware computations. The software used to implement MoNETA, Cog Ex Machina, has been featured on the cover page of IEEE Computer in February 2011 in a joint article [70] by HP Labs and the Boston University Neuromorphics Lab. Application of the memristor crossbar structure in the construction of analog soft computing system is demonstrated by Farnood Merrikh-Bayat and Saeed Bagheri Shouraki.[71] They have also shown in 2011 [72] how memristor crossbars can be combined with fuzzy logic to create analog memristive neuro-fuzzy computing system with fuzzy input and output terminals. Learning of this system is based on the creation of fuzzy relations inspired from Hebbian learning rule.

## Memcapacitors and meminductors

In 2009, Massimiliano Di Ventra, Yuriy Pershin and Leon Chua co-wrote an article[73] extending the notion of memristive systems to capacitive and inductive elements in the form of memcapacitors and meminductors whose properties depend on the state and history of the system.

## Historical timeline

1808
Sir Humphry Davy is claimed to have performed the first experiments showing the effects of a memristor.[4][74]
1971
Leon Chua, a professor at UC Berkeley, postulated a new two-terminal circuit element characterized by a relationship between charge and flux linkage as a fourth fundamental circuit element in the article "Memristor-the Missing Circuit Element" published in IEEE Transactions on Circuit Theory.
1976
Chua and his student Sung Mo Kang published a paper entitled "Memristive Devices and Systems" in the Proceedings of the IEEE generalizing the theory of memristors and memristive systems including a property of zero crossing in the Lissajous curve characterizing current vs. voltage behavior.
2007
(April 10) Gregory Snider of HP Labs received U.S. Patent 7,203,789 (assigned to Hewlett-Packard), describing implementations of 2-terminal resistance switches similar to memristors in reconfigurable computing architectures.
(August 10) Snider published the article "Self-organized computation with unreliable, memristive nanodevices" in the Journal of Nanoscience and Nanotechnology discussing memristive nanodevices useful to pattern recognition and reconfigurable circuit architectures.
2008
(April 15) Snider received U.S. Patent 7,359,888(assigned to Hewlett-Packard) including basic claims to a nanoscale 2-terminal resistance switch crossbar array formed as a neural network.
(May 1) Dmitri Strukov, Gregory Snider, Duncan Stewart, and Stan Williams, of HP Labs, publish an article in Nature "The missing memristor found"[75] identifying a link between the 2-terminal resistance switching behavior found in nanoscale systems and Leon Chua's memristor.
(July 7) Victor Erokhin and M.P. Fontana claim to have developed a polymeric memristor before the titanium dioxide memristor of Stan Williams group in the article "Electrochemically controlled polymeric device: a memristor (and more) found two years ago".
(July 15) J. Joshua Yang, Matthew D. Pickett, Xuema Li, Douglas A. A. Ohlberg, Duncan R. Stewart and R. Stanley Williams published an article in Nature Nanotechnology "Memristive switching mechanism for metal/oxide/metal nano-devices" demonstrating the memristive switching behavior and mechanism in nanodevices.
(September 14–16) Blaise Mouttet, a graduate student at George Mason University, presented a paper entitled "Proposal for Memristors in Signal Processing" at Nano-Net 2008, a nanotechnology conference in Boston.
(September 23) Yu V. Pershin and M. Di Ventra of University of California, San Diego published "Spin memristive systems: Spin memory effects in semiconductor spintronics" in Physical Review Letters noting memristive behavior in spintronics.
(October 22) Yu V. Pershin, S. La Fontaine, M. Di Ventra published "Memristive model of amoeba's learning" identifying memristive behavior in amoeba's learning.
(October 28) Duncan Stewart, Patricia Beck, and Doug Ohlberg, researchers at HP Labs, received U.S. Patent 7,443,711 (assigned to Hewlett-Packard) including basic patent claims to a tunable nanoscale 2-terminal resistance switch.
(November 21) Chua, Stan Williams, Snider, Rainer Waser, Wolfgang Porod, Massimiliano Di Ventra, and Mouttet spoke at a Symposium on Memristors and Memristive Systems held at University of California, Berkeley. Discussion included the theoretical foundations of memristors and memristive systems and the prospects of memristors for RRAM and neuromorphic electronic architectures.
2009
(January 21) Sung Hyun Jo, Kuk-Hwan Kim, and Wei Lu of the University of Michigan published "High-Density Crossbar Arrays Based on a Si Memristive System" inNanoLetters, which detailed an amorphous silicon based memristive material capable of being integrated with CMOS devices.
(January 23) Di Ventra, Pershin and Chua submitted "Circuit elements with memory: memristors, memcapacitors and meminductors" to arXiv.[76] which extended the notion of memristive systems to capacitive and inductive elements, namely capacitors and inductors whose properties depend on the state and history of the system.
(February 10) HP Labs published "A hybrid nanomemristor/transistor logic circuit capable of self-programming" in the Proceedings of the National Academy of Sciences.
(May 1) An article is published "Nanoparticle Assemblies as Memristors" in NanoLetters, describing a newly discovered memristor material based on magnetite nanoparticles and proposing an extended memristor model including both time-dependent resistance and time-dependent capacitance.
(May 19) Yuriy Pershin and Massimiliano Di Ventra published a preliminary article in Nature Precedings entitled "Experimental demonstration of associative memory with memristive neural networks" in which a memristor emulator demonstrated properties of a neural synapse.
(June 2) A. Delgado published "Input Output Linearization of Memristive Systems" in the Proceedings of the 2009 IEEE Nanotechnology Materials and Devices Conference; demonstrating that feedback linearization can be applied to the memristor producing a linear device.
(June 3) Scientists at NIST published "A Flexible Solution-Processed Memristor" in IEEE Electron Device Letters. NIST's memristor is based on TiO2 like HPLabs', but is fabricated using a less expensive room temperature deposition process and deposits the memristive material on flexible polymer sheets with potential applications as components of biosensors or radio-frequency identification (RFID).
(July 13) At the 2nd International Multi-Conference on Engineering and Technological Innovation, Mouttet described a memristor-based pattern recognition circuit performing an analog variation of the exclusive nor function. The circuit architecture was proposed as a way to circumvent Von Neumann's bottleneck for processors used in robotic control systems.[77]
(August 4) The physical realization of an electrically modifiable array of memristive neural synapses was achieved by researchers at the Gwangju Institute of Science and Technology as reported in Nanotechnology.[78]
(September 17) Memristive behavior of magnetic tunnel junctions was reported by researchers from the Bielefeld University, Germany.[49] A combination of resistive and magnetoresistive switching produced a second order memristive device. The state variables are the state of the insulating layer (oxygen vacancy positions) and the state of the magnetic electrodes (the relative orientation of the magnetization direction).
2010
(February 2) The 2nd Memristor and Memristive Systems Symposium was held on Tuesday, February 2, 2010 at Sutardja Dai Hall, UC Berkeley.
(February 17) A review on memristor and its modeling approaches was accepted by the Proceedings of the Royal Society.[79]
(April 8) An array of memristors demonstrated the ability to perform logical operations.[80]
(April 20) Memristor-based Content Addressable Memory (MCAM) was introduced and accepted in IEEE Transactions on Very Large Scale Integration (VLSI) Systems.[81]
(June 1) At the 2010 International Symposium on Circuits and Systems, there were two special sessions on memristor devices and fabrication. Mouttet's talk "The mythology of the memristor" argued that the interpretation of the memristor as a fourth fundamental was incorrect and that the device discovered by HPLabs was not actually a memristor, but part of a broader class of memristive systems.[82]
(August 31) HP announced they had teamed up with Hynix to produce a commercial product dubbed "ReRam".[83]
(October 15) At the 2010 IEEE Nanotechnology Materials and Devices Conference, Delgado presented "The Memristor as Controller". This work introduced the memristor as a programmable gain for closed loop systems and derived an approximate describing function for the pinched hysteresis loop.
(December 7) Ju-Hee So and Hyung-Jun Koo of North Carolina State University announced a hydrogel form of memristor which was speculated to be useful to construct a brain-computer interface.[84]
2011
(Oct) Researchers at Palo Alto Research Center (PARC) demonstrated printed memristive counters based on solution processing, with potential applications as low-cost packaging components (no battery needed; powered by energy scavenging mechanism).[85]
2012
(March 23) A team of researchers from HRL Laboratories and the University of Michigan announced the first functioning memristor array built on a CMOS chip for applications in neuromorphic computer architectures.[11]
(July 31) Severe criticism of the generalized memristor concept in the publication "Fundamental Issues and Problems in the Realization of Memristors".[21]
2013
(February 27) Senior lecturer Dr. Andy Thomas and his colleagues from Bielefeld University construct a memristor that is capable of learning. The group utilize memristors as key components in a blueprint for an artificial brain. The results are presented in the March print edition of the Journal of Physics published by the Institute of Physics in London.[86]
(April 23) A group from the Jülich Aachen Research Alliance including researches from RWTH Aachen University and Forschungszentrum Jülich argue in an article in Nature Communications that the current memristive theory must be extended to a whole new theory to properly describe redox-based resistively switching elements (ReRAM). The main reason is the existence of nanobatteries in redox-based resistive switches which violates the memristor theory's requirement for a pinched hysteresis.[3]

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