# Memristor

Memristor
Type Passive
Working principle Memristance
Invented Leon Chua (1971)
First production HP Labs (2008)
Electronic symbol

The memristor (; a portmanteau of "memory resistor") was originally envisioned in 1971 by circuit theorist Leon Chua as a missing non-linear passive two-terminal electrical component relating electric charge and magnetic flux linkage.[1] According to the governing mathematical relations, the memristor's electrical resistance is not constant but depends on the history of current that had previously flowed through the device, i.e., its current resistance depends on how much electric charge has flowed in what direction through it in the past. The device remembers its history, that is, when the electric power supply is turned off, the memristor remembers its most recent resistance until it is turned on again.[2][3] Thermodynamic considerations, however, show that such a memristor component cannot exist as a solid state device in physical reality because its behavior would be inconsistent with fundamental laws of non-equilibrium thermodynamics.[4][5]

Leon Chua has more recently argued that the definition could be generalized to cover all forms of 2-terminal non-volatile memory devices based on resistance switching effects[6] although some experimental evidence contradicts this claim, since a non-passive nanobattery effect is observable in resistance switching memory.[7] Chua also argued that the memristor is the oldest known circuit element with its effects predating the resistor, capacitor and inductor.[8] The memristor is currently under development by various teams including Hewlett-Packard, SK Hynix and HRL Laboratories.

In 2008, a team at HP Labs claimed to have found Chua's missing memristor based on an analysis of a thin film of titanium dioxide.[9] However, some skepticism has been expressed regarding this analysis.[4] These devices are intended for applications in nanoelectronic memories, computer logic and neuromorphic computer architectures.[10] In October 2011, the team announced the commercial availability of memristor technology within 18 months, as a replacement for Flash, SSD, DRAM and SRAM.[11] Commercial availability was more recently estimated as 2018.[12] In March 2012, a team of researchers from HRL Laboratories and the University of Michigan announced the first functioning memristor array built on a CMOS chip.[13]

An array of 17 purpose-built oxygen-depleted titanium dioxide memristors built at HP Labs, imaged by an atomic force microscope. The wires are about 50 nm, or 150 atoms, wide.[14] Electric current through the memristors shifts the oxygen vacancies, causing a gradual and persistent change in electrical resistance.[15]

## Background

Conceptual symmetry between the resistor, capacitor, inductor, and the memristor.

In his 1971 paper, Chua extrapolated a conceptual symmetry between the nonlinear resistor (voltage vs. current), nonlinear capacitor (voltage vs. charge) and nonlinear inductor (magnetic flux linkage vs. current). He then inferred the possibility of a memristor as another fundamental nonlinear circuit element linking magnetic flux linkage and charge. In contrast to a linear (or nonlinear) resistor the memristor has a dynamic relationship between current and voltage including a memory of past voltages or currents. Other scientists had proposed dynamic memory resistors such as the memistor of Bernard Widrow, but Chua attempted to introduce mathematical generality.

Memristor resistance depends on the integral of the input applied to the terminals (rather than on the instantaneous value of the input as in a varistor).[2] Since the element "remembers" the amount of current that last passed through, it was tagged by Chua with the name "memristor". Another way of describing a memristor is as any passive two-terminal circuit element that maintains a functional relationship between the time integral of current (called charge) and the time integral of voltage (often called flux, as it is related to magnetic flux). The slope of this function is called the memristance M and is similar to variable resistance. However, purely current- or voltage-controlled memristors cannot exist in physical reality because they would then operate in conflict with fundamental laws of non-equilibrium thermodynamics.[4][5]

The memristor definition is based solely on the fundamental circuit variables of current and voltage and their time-integrals, just like the resistor, capacitor and inductor. Unlike those three elements however, which are allowed in linear time-invariant or LTI system theory, memristors of interest have a dynamic function with memory and may be described as some function of net charge. There is no such thing as a standard memristor. Instead, each device implements a particular function, wherein the integral of voltage determines the integral of current, and vice versa. A linear time-invariant memristor, with a constant value for M, is simply a conventional resistor.[1] Like other two-terminal components, real-world devices are never purely memristors ("ideal memristor"), but also exhibit some amount of capacitance, resistance and inductance.

## Memristor definition and criticism

According to the original 1971 definition, the memristor was the fourth fundamental circuit element, forming a non-linear relationship between electric charge and magnetic flux linkage. In 2011 Chua argued for a broader definition that included all 2-terminal non-volatile memory devices based on resistance switching.[6] Williams argued that MRAM, phase change memory and RRAM were memristor technologies.[16] Some researchers argued that biological structures such as blood[17] and skin[18] fit the definition. Others argued that the memory device under development by HP Labs and other forms of RRAM were memristive systems but part of a broader class of variable resistance systems [19] and that a broader definition of memristor is a scientifically unjustifiable land grab that favored HP's memristor patents.[20]

Meuffels and Schroeder noted that one of the early memristor papers included a mistaken assumption regarding ionic conduction.[21] Meuffels and Soni discussed issues and problems in the realization of memristors.[4] They claimed that the physics behind the HP memristor model conflicts with fundamentals of solid state electrochemistry as the coupling of electronic/ionic diffusion currents was not considered. Additionally, they pointed to issues concerning fundamentals of non-equilibrium thermodynamics: the dynamic state equations set up for memristors like the HP memristor imply the possibility of violating Landauer's principle of the minimum amount of energy required to change "information" states in a system.[4] This critique was endorsed by Di Ventra and Pershin.[5]

Nonvolatile information storage requires the existence of energy barriers that separate distinct memory states from each other.[4][5] Memristors whose resistance (memory) states depend only on the current (like the HP memristor) or voltage history would be unable to protect their memory states against unavoidable fluctuations and thus permanently suffer information loss: the proposed hypothetical concept provides no physical mechanism enabling such systems to retain memory states after the applied current or voltage stress is removed. Such elements can therefore not exist, as they would always be susceptible to a so-called "stochastic catastrophe".[5]

Other researchers noted that memristor models based on the assumption of linear ionic drift do not account for asymmetry between set time (high-to-low resistance switching) and reset time (low-to-high resistance switching) and do not provide ionic mobility values consistent with experimental data. Non-linear ionic drift models have been proposed to compensate for this deficiency.[22]

Martin Reynolds, an electrical engineering analyst with research outfit Gartner, commented that while HP was being sloppy in calling their device a memristor, critics were being pedantic in saying it was not a memristor.[23]

## Experimental tests for memristors

Chua suggested experimental tests to determine if a device may properly be categorized as a memristor:[24]

• The Lissajous curve in the voltage-current plane is a pinched hysteresis loop when driven by any bipolar periodic voltage or current without respect to initial conditions.
• The area of each lobe of the pinched hysteresis loop shrinks as the frequency of the forcing signal increases.
• As the frequency tends to infinity, the hysteresis loop degenerates to a straight line through the origin, whose slope depends on the amplitude and shape of the forcing signal.

According to Chua[25] all resistive switching memories including ReRAM, MRAM and phase change memory meet these criteria and are memristors. However, the lack of data for the Lissajous curves over a range of initial conditions or over a range of frequencies, complicates assessments of this claim.

Experimental evidence shows that redox-based resistance memory (ReRAM) includes a nanobattery effect that is contrary to Chua's memristor model. This indicates that the memristor theory needs to be extended or corrected to enable accurate ReRAM modeling.[7]

## Theory

The memristor was originally defined in terms of a non-linear functional relationship between magnetic flux linkage Φm(t) and the amount of electric charge that has flowed, q(t):[1]

$f(\mathrm \Phi_\mathrm m(t),q(t))=0$

The variable Φm ("magnetic flux linkage") is generalized from the circuit characteristic of an inductor. It does not represent a magnetic field here. Its physical meaning is discussed below. The symbol Φm may be regarded as the integral of voltage over time.[26]

In the relationship between Φm and q, the derivative of one with respect to the other depends on the value of one or the other, and so each memristor is characterized by its memristance function describing the charge-dependent rate of change of flux with charge.

$M(q)=\frac{\mathrm d\Phi_m}{\mathrm dq}$

Substituting the flux as the time integral of the voltage, and charge as the time integral of current, the more convenient form is

$M(q(t))=\cfrac{\mathrm d\Phi_m/\mathrm dt}{\mathrm dq/\mathrm dt}=\frac{V(t)}{I(t)}$

To relate the memristor to the resistor, capacitor, and inductor, it is helpful to isolate the term M(q), which characterizes the device, and write it as a differential equation.

Device Characteristic property (units) Differential equation
Resistor Resistance (V per A, or Ohm, Ω) R = dV / dI
Capacitor Capacitance (C per V, or Farads) C = dq / dV
Inductor Inductance (Wb per A, or Henrys) L = dΦm / dI
Memristor Memristance (Wb per C, or Ohm) M = dΦm / dq

The above table covers all meaningful ratios of differentials of I, Q, Φm, and V. No device can relate dI to dq, or m to dV, because I is the derivative of Q and Φm is the integral of V.

It can be inferred from this that memristance is charge-dependent resistance. If M(q(t)) is a constant, then we obtain Ohm's Law R(t) = V(t)/ I(t). If M(q(t)) is nontrivial, however, the equation is not equivalent because q(t) and M(q(t)) can vary with time. Solving for voltage as a function of time produces

$V(t) =\ M(q(t)) I(t)$

This equation reveals that memristance defines a linear relationship between current and voltage, as long as M does not vary with charge. Nonzero current implies time varying charge. Alternating current, however, may reveal the linear dependence in circuit operation by inducing a measurable voltage without net charge movement—as long as the maximum change in q does not cause much change in M.

Furthermore, the memristor is static if no current is applied. If I(t) = 0, we find V(t) = 0 and M(t) is constant. This is the essence of the memory effect.

The power consumption characteristic recalls that of a resistor, I2R.

$P(t) =\ I(t)V(t) =\ I^2(t) M(q(t))$

As long as M(q(t)) varies little, such as under alternating current, the memristor will appear as a constant resistor. If M(q(t)) increases rapidly, however, current and power consumption will quickly stop.

M(q) is physically restricted to be positive for all values of q (assuming the device is passive and does not become superconductive at some q). A negative value would mean that it would perpetually supply energy when operated with alternating current.

In 2008 researchers from HP Labs introduced a model for a memristance function based on thin films of titanium dioxide.[2] For RON<<ROFF the memristance function was determined to be

$M(q(t)) = R_\mathrm{OFF} \cdot \left(1-\frac{\mu_{v}R_\mathrm{ON}}{D^2} q(t)\right)$

where ROFF represents the high resistance state, RON represents the low resistance state, μv represents the mobility of dopants in the thin film, and D represents the film thickness. The HP Labs group noted that "window functions" were necessary to compensate for differences between experimental measurements and their memristor model due to nonlinear ionic drift and boundary effects.

### Operation as a switch

For some memristors, applied current or voltage causes substantial change in resistance. Such devices may be characterized as switches by investigating the time and energy that must be spent to achieve a desired change in resistance. This assumes that the applied voltage remains constant. Solving for energy dissipation during a single switching event reveals that for a memristor to switch from Ron to Roff in time Ton to Toff, the charge must change by ΔQ = QonQoff.

$E_{\mathrm{switch}} =\ V^2\int_{T_\mathrm{off}}^{T_\mathrm{on}} \frac{\mathrm dt}{M(q(t))} =\ V^2\int_{Q_\mathrm{off}}^{Q_\mathrm{on}}\frac{\mathrm dq}{I(q)M(q)} =\ V^2\int_{Q_\mathrm{off}}^{Q_\mathrm{on}}\frac{\mathrm dq}{V(q)} =\ V\Delta Q$

Substituting V=I(q)M(q), and then ∫dq/V = ∆Q/V for constant VTo produces the final expression. This power characteristic differs fundamentally from that of a metal oxide semiconductor transistor, which is capacitor-based. Unlike the transistor, the final state of the memristor in terms of charge does not depend on bias voltage.

The type of memristor described by Williams ceases to be ideal after switching over its entire resistance range, creating hysteresis, also called the "hard-switching regime".[2] Another kind of switch would have a cyclic M(q) so that each off-on event would be followed by an on-off event under constant bias. Such a device would act as a memristor under all conditions, but would be less practical.

### Memristive systems

The memristor was generalized to memristive systems in Chua's 1976 paper.[27] Whereas a memristor has mathematically scalar state, a system has vector state. The number of state variables is independent of the number of terminals.

Chua applied this model to empirically-observed phenomena, including the Hodgkin–Huxley model of the axon and a thermistor at constant ambient temperature. He also described memristive systems in terms of energy storage and easily-observed electrical characteristics. These characteristics might match resistive random-access memory relating the theory to active areas of research.

In the more general concept of an n-th order memristive system the defining equations are

$y(t)=g(\textbf{x},u,t)u(t),$
$\dot{\textbf{x}}=f(\textbf{x},u,t)$

where u(t) is an input signal, y(t) is an output signal, the vector x represents a set of n state variables describing the device, and g and f are continuous functions. For a current-controlled memristive system the signal u(t) represents the current signal, i(t) and the signal y(t) represents the voltage signal v(t). For a voltage-controlled memristive system the signal u(t) represents the voltage signal v(t) and the signal y(t) represents the current signal i(t).

The pure memristor is a particular case of these equations, namely when x depends only on charge (x=q) and since the charge is related to the current via the time derivative dq/dt=i(t). Thus for pure memristors f (i.e. the rate of change of the state) must be equal or proportional to the current i(t) .

### Pinched hysteresis

Example of pinched hysteresis curve, V versus I

One of the resulting properties of memristors and memristive systems is the existence of a pinched hysteresis effect. [28] For a current-controlled memristive system, the input u(t) is the current i(t), the output y(t) is the voltage v(t), and the slope of the curve represents the electrical resistance. The change in slope of the pinched hysteresis curves demonstrates switching between different resistance states which is a phenomenon central to ReRAM and other forms of two-terminal resistance memory. At high frequencies, memristive theory predicts the pinched hysteresis effect will degenerate, resulting in a straight line representative of a linear resistor. It has been proven that some types of non-crossing pinched hysteresis curves (denoted Type-II) cannot be described by memristors.[29]

### Extended memristive systems

Some researchers have raised the question of the scientific legitimacy of HP's memristor models in explaining the behavior of ReRAM.[19][20] and have suggested extended memristive models to remedy perceived deficiencies.[7]

One example[30] attempts to extend the memristive systems framework by including dynamic systems incorporating higher-order derivatives of the input signal u(t) as a series expansion

$y(t)=g_0(\textbf{x},u)u(t)+ g_1(\textbf{x},u){\operatorname{d}^2u\over\operatorname{d}t^2}+ g_2(\textbf{x},u){\operatorname{d}^4u\over\operatorname{d}t^4}+ ... + g_m(\textbf{x},u){\operatorname{d}^{2m}u\over\operatorname{d}t^{2m}},$
$\dot{\textbf{x}}=f(\textbf{x},u)$

where m is a positive integer, u(t) is an input signal, y(t) is an output signal, the vector x represents a set of n state variables describing the device, and the functions g and f are continuous functions. This equation produces the same zero-crossing hysteresis curves as memristive systems but with a different frequency response than that predicted by memristive systems.

Another example suggests including an offset value a to account for an observed nanobattery effect which violates the predicted zero-crossing pinched hysteresis effect.[7]

$y(t)=g_0(\textbf{x},u)(u(t)-a),$
$\dot{\textbf{x}}=f(\textbf{x},u)$

## Implementations

### Titanium dioxide memristor

Interest in the memristor revived when an experimental solid state version was reported by R. Stanley Williams of Hewlett Packard.[31][32][33] The article was the first to demonstrate that a solid-state device could have the characteristics of a memristor based on the behavior of nanoscale thin films. The device neither uses magnetic flux as the theoretical memristor suggested, nor stores charge as a capacitor does, but instead achieves a resistance dependent on the history of current.

Although not cited in HP's initial reports on their TiO2 memristor, the resistance switching characteristics of titanium dioxide were originally described in the 1960s.[34]

The HP device is composed of a thin (50 nm) titanium dioxide film between two 5 nm thick electrodes, one titanium, the other platinum. Initially, there are two layers to the titanium dioxide film, one of which has a slight depletion of oxygen atoms. The oxygen vacancies act as charge carriers, meaning that the depleted layer has a much lower resistance than the non-depleted layer. When an electric field is applied, the oxygen vacancies drift (see Fast ion conductor), changing the boundary between the high-resistance and low-resistance layers. Thus the resistance of the film as a whole is dependent on how much charge has been passed through it in a particular direction, which is reversible by changing the direction of current.[2] Since the HP device displays fast ion conduction at nanoscale, it is considered a nanoionic device.[35]

Memristance is displayed only when both the doped layer and depleted layer contribute to resistance. When enough charge has passed through the memristor that the ions can no longer move, the device enters hysteresis. It ceases to integrate q=∫Idt, but rather keeps q at an upper bound and M fixed, thus acting as a constant resistor until current is reversed.

Memory applications of thin-film oxides had been an area of active investigation for some time. IBM published an article in 2000 regarding structures similar to that described by Williams.[36] Samsung has a U.S. patent for oxide-vacancy based switches similar to that described by Williams.[37] Williams also has a U.S. patent application related to the memristor construction.[38]

In April 2010, HP labs announced that they had practical memristors working at 1 ns (~1 GHz) switching times and 3 nm by 3 nm sizes,[39] which bodes well for the future of the technology.[40] At these densities it could easily rival the current sub-25 nm flash memory technology.

### Polymeric memristor

In 2004, Krieger and Spitzer described dynamic doping of polymer and inorganic dielectric-like materials that improved the switching characteristics and retention required to create functioning nonvolatile memory cells.[41] They used a passive layer between electrode and active thin films, which enhanced the extraction of ions from the electrode. It is possible to use fast ion conductor as this passive layer, which allows a significant reduction of the ionic extraction field.

In July 2008, Erokhin and Fontana claimed to have developed a polymeric memristor before the more recently announced titanium dioxide memristor.[42]

In 2012, Crupi, Pradhan and Tozer described a proof of concept design to create neural synaptic memory circuits using organic ion-based memristors.[43] The synapse circuit demonstrated long-term potentiation for learning as well as inactivity based forgetting. Using a grid of circuits, a pattern of light was stored and later recalled. This mimics the behavior of the V1 neurons in the primary visual cortex that act as spatiotemporal filters that process visual signals such as edges and moving lines.

### Ferroelectric memristor

The ferroelectric memristor[44] is based on a thin ferroelectric barrier sandwiched between two metallic electrodes. Switching the polarization of the ferroelectric material by applying a positive or negative voltage across the junction can lead to a two order of magnitude resistance variation: ROFF >> RON (an effect called Tunnel Electro-Resistance). In general, the polarization does not switch abruptly. The reversal occurs gradually through the nucleation and growth of ferroelectric domains with opposite polarization. During this process, the resistance is neither RON or ROFF, but in between. When the voltage is cycled, the ferroelectric domain configuration evolves, allowing a fine tuning of the resistance value. The ferroelectric memristor's main advantages are that ferroelectric domain dynamics can be tuned, offering a way to engineer the memristor response, and that the resistance variations are due to purely electronic phenomena, aiding device reliability, as no deep change to the material structure is involved.

### Spin memristive systems

#### Spintronic memristor

Chen and Wang, researchers at disk-drive manufacturer Seagate Technology described three examples of possible magnetic memristors.[45] In one device resistance occurs when the spin of electrons in one section of the device points in a different direction from those in another section, creating a "domain wall", a boundary between the two sections. Electrons flowing into the device have a certain spin, which alters the device's magnetization state. Changing the magnetization, in turn, moves the domain wall and changes the resistance. The work's significance led to an interview by IEEE Spectrum.[46] A first experimental proof of the spintronic memristor based on domain wall motion by spin currents in a magnetic tunnel junction was given in 2011.[47]

#### Spin-transfer torque magnetoresistance

Spin-transfer torque MRAM is a well-known device that exhibits memristive behavior. The resistance is dependent on the magnetic state of a magnetic tunnel junction, i.e., on the relative magnetization alignment of the two electrodes. This can be controlled by spin torque induced by current flowing through the junction. However, the length of time the current flows through the junction determines the amount of current needed, i.e., charge is the key variable.[48]

Additionally, Krzysteczko et al.,[49] reported that MgO-based magnetic tunnel junction s show memristive behavior based on the drift of oxygen vacancies within the insulating MgO layer (resistive switching). Therefore, the combination of spin-transfer torque and resistive switching leads naturally to a second-order memristive system described by the state vector x=(x1,x2), where x1 describes the magnetic state of the electrodes and x2 denotes the resistive state of the MgO barrier. In this case the change of x1 is current-controlled (spin torque is due to a high current density) whereas the change of x2 is voltage-controlled (the drift of oxygen vacancies is due to high electric fields). The presence of both effects in a memristive magnetic tunnel junction led to the idea of a nanoscopic synapse-neuron system.[50]

#### Spin memristive system

A fundamentally different mechanism for memristive behavior has been proposed by Pershin[51] and Di Ventra.[52][53] The authors show that certain types of semiconductor spintronic structures belong to a broad class of memristive systems as defined by Chua and Kang.[27] The mechanism of memristive behavior in such structures is based entirely on the electron spin degree of freedom which allows for a more convenient control than the ionic transport in nanostructures. When an external control parameter (such as voltage) is changed, the adjustment of electron spin polarization is delayed because of the diffusion and relaxation processes causing hysteresis. This result was anticipated in the study of spin extraction at semiconductor/ferromagnet interfaces,[54] but was not described in terms of memristive behavior. On a short time scale, these structures behave almost as an ideal memristor.[1] This result broadens the possible range of applications of semiconductor spintronics and makes a step forward in future practical applications.

## Applications

Williams' solid-state memristors can be combined into devices called crossbar latches, which could replace transistors in future computers, given their much higher circuit density.

They can potentially be fashioned into non-volatile solid-state memory, which would allow greater data density than hard drives with access times similar to DRAM, replacing both components.[55] HP prototyped a crossbar latch memory that can fit 100 gigabits in a square centimeter,[9] and proposed a scalable 3D design (consisting of up to 1000 layers or 1 petabit per cm3).[56] In May 2008 HP reported that its device reaches currently about one-tenth the speed of DRAM.[57] The devices' resistance would be read with alternating current so that the stored value would not be affected.[58] In May 2012 it was reported that access time had been improved to 90 nanoseconds if not faster, approximately one hundred times faster than contemporaneous flash memory, while using one percent as much energy.[59]

Memristor patents include applications in programmable logic,[60] signal processing,[61] neural networks,[62] control systems,[63] reconfigurable computing,[64] brain-computer interfaces[65] and RFID.[66] Memristive devices are potentially used for stateful logic implication, allowing a replacement for CMOS-based logic computation. Several early works in this direction are reported.[67] [68]

In 2009, a simple electronic circuit[69] consisting of an LC network and a memristor was used to model experiments on adaptive behavior of unicellular organisms.[70] It was shown that subjected to a train of periodic pulses, the circuit learns and anticipates the next pulse similar to the behavior of slime molds Physarum polycephalum where the viscosity of channels in the cytoplasm responds to periodic environment changes.[70] Applications of such circuits may include, e.g., pattern recognition. The DARPA SyNAPSE project funded HP Labs, in collaboration with the Boston University Neuromorphics Lab, to develop neuromorphic architectures which may be based on memristive systems. In 2010, Versace and Chandler described the MoNETA (Modular Neural Exploring Traveling Agent) model.[71] MoNETA is the first large-scale neural network model to implement whole-brain circuits to power a virtual and robotic agent using memristive hardware.[72] Application of the memristor crossbar structure in the construction of an analog soft computing system was demonstrated by Merrikh-Bayat[73] and Shouraki.[74][75] In 2011 they showed [76] how memristor crossbars can be combined with fuzzy logic to create an analog memristive neuro-fuzzy computing system with fuzzy input and output terminals. Learning is based on the creation of fuzzy relations inspired from Hebbian learning rule.

In 2013 Leon Chua published a tutorial underlining the broad span of complex phenomena and applications that memristors span and how they can be used as non-volatile analog memories and can mimic classic habituation and learning phenomena.[77]

## Memcapacitors and meminductors

In 2009, Di Ventra, Pershin and Chua extended[78] the notion of memristive systems to capacitive and inductive elements in the form of memcapacitors and meminductors, whose properties depend on the state and history of the system, further extended in 2013 by Di Ventra and Pershin.[5]

## Timeline

### 1808

Sir Humphry Davy is claimed by Leon Chua to have performed the first experiments showing the effects of a memristor.[8][79]

### 1960

Bernard Widrow coins the term memistor (i.e. memory resistor) to describe components of an early artificial neural network called ADALINE.

### 1968

Argall publishes an article showing the resistance switching effects of TiO2 which was later claimed in 2008 to be evidence of a memristor by researchers from Hewlett Packard.[34]

### 1971

Leon Chua postulated a new two-terminal circuit element characterized by a relationship between charge and flux linkage as a fourth fundamental circuit element.[1]

### 1976

Chua and his student Sung Mo Kang generalized the theory of memristors and memristive systems including a property of zero crossing in the Lissajous curve characterizing current vs. voltage behavior.[27]

### 2005

On May 3 U.S. Patent 6,889,216 was issued. It described implementations of 2-terminal resistance-changing devices similar to memristors in neural network architectures.

On December 6 Alex Nugent presents to the Atlantic Nano Forum at the US Patent Office[80][81][82] on how to use 2-terminal resistance-changing devices in reconfigurable logic and pattern recognition architectures and discusses the power arguments that led to the creation of DARPA's SyNAPSE program.[83]

### 2007

On April 10 U.S. Patent 7,203,789 was issued. It described implementations of 2-terminal resistance switches similar to memristors in reconfigurable computing architectures.

On November 27 U.S. Patent 7,302,513 was issued. it described implementations of 2-terminal resistance switches similar to memristors in signal processing and pattern recognition.

### 2008

On April 15 U.S. Patent 7,359,888 was issued, including basic claims to a nanoscale 2-terminal resistance switch crossbar array formed as a neural network.

On May 1 Strukov, Snider, Stewart and Williams published an article in Nature identifying a link between the 2-terminal resistance switching behavior found in nanoscale systems and memristors.[84]

On August 26 U.S. Patent 7,417,271 was issued, including claims covering the device described in the Nature article by Strukov et al.

On September 2 U.S. Patent 7,420,396 was issued. It describes a dynamic circuit that provides voltage feedback to memristive devices to create attractor states that are universal logic functions.

On October 28 U.S. Patent 7,443,711 was issued, including basic claims to a tunable nanoscale 2-terminal resistance switch.

### 2009

On January 23 Di Ventra, Pershin and Chua extended the notion of memristive systems to capacitive and inductive elements, namely capacitors and inductors whose properties depend on the state and history of the system.[85]

On May 1 Kim, et al. described a newly discovered memristor material based on magnetite nanoparticles and proposed an extended memristor model including both time-dependent resistance and time-dependent capacitance.[86]

On July 13 Mouttet described a memristor-based pattern recognition circuit performing an analog variation of the exclusive nor function. The circuit architecture was proposed as a way to circumvent Von Neumann architecture#Von Neumann bottleneck for processors used in robotic control systems.[87]

On August 4 Choi e. al. described the physical realization of an electrically modifiable array of memristive neural synapses.[88]

### 2010

On April 8 Borghetti, et al. described an array of memristors demonstrated the ability to perform logical operations.[89]

On April 20 Memristor-based content addressable memory (MCAM) was introduced.[90]

On June 1 Mouttet argued that the interpretation of the memristor as a fourth fundamental was incorrect and that the HP Labs device was part of a broader class of memristive systems.[91]

On August 31 HP announced they had teamed up with Hynix to produce a commercial product dubbed "ReRam".[92]

On December 7 So and Koo developed a hydrogel form of memristor that was speculated to be useful to construct a brain-computer interface.[93]

### 2011

In October Tse demonstrated printed memristive counters based on solution processing, with potential applications as low-cost packaging components (no battery needed; powered by energy scavenging mechanism).[94]

### 2012

On March 23 HRL Laboratories and the University of Michigan announced the first functioning memristor array built on a CMOS chip for applications in neuromorphic computer architectures.[13]

On July 31 Meuffels and Soni criticized the memristor concept as being incompatible with fundamentals of non-equilibrium thermodynamics.[4]

### 2013

On February 27 Thomas et al., demonstrated that a memristor can be used to mimic a synapse more readily than traditional CMOS technology and be used as the foundation for building physical circuits capable of learning. The approach utilizes memristors as key components in a blueprint for an artificial brain.[95]

On April 23 Valov, et al., argued that the current memristive theory must be extended to a whole new theory to properly describe redox-based resistively switching elements (ReRAM). The main reason is the existence of nanobatteries in redox-based resistive switches which violates the memristor theory's requirement for a pinched hysteresis.[7]

### 2014

On February 10, 2014, Nugent and Molter presented a new form of computing dubbed "AHaH Computing", which uses two serially connected memristors as the storage medium for synaptic weights. The proposed architecture provides a solution to the "von Neumann Bottleneck" by merging processor and memory, and future hardware based on the technology may reduce the power consumption of a wide range of machine learning applications.[96]