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The Motorola 68881 and Motorola 68882 are floating-point coprocessor (FPU) devices that were used in some computer systems in conjunction with the 68020 or 68030 microprocessors. The Motorola 68881 was introduced in 1984. The addition of one of these devices added substantial cost to a computer, but added a floating point unit that could rapidly perform floating point mathematical calculations. In the mid 1980s, this feature was useful mostly for scientific and mathematical software.
The 68020 and 68030 CPUs were designed with the separate 68881 chip in mind. Their instruction sets reserved the "F-line" instructions — that is, all opcodes beginning with the hexadecimal digit "F" could either be forwarded to an external coprocessor or be used as "traps" which would throw an exception, handing control to the computer's operating system. If an FPU is not present in the system, the OS would then either call an FPU emulator to execute the instruction's equivalent using 68020 integer-based software code, return an error to the program, terminate the program, or crash and require a reboot.
The 68881 had eight 80-bit data registers (a 64-bit mantissa plus a sign bit, and a 15-bit signed exponent). It allowed seven different modes of numeric representation, including single-precision, double-precision, and extended-precision, as defined by the IEEE floating-point standard, IEEE 754. It was designed specifically for floating-point math and was not a general-purpose CPU. For example, when an instruction required any address calculations, the main CPU would handle them before the 68881 took control.
The CPU/FPU pair were designed such that both could run at the same time. When the CPU encountered a 68881 instruction, it would hand the FPU all operands needed for that instruction, and then the FPU would release the CPU to go on and execute the next instruction.
The 68882 was an improved version of the 68881, with better pipelining, and eventually available at higher clock speeds. Its instruction set was exactly the same as that of the 68881. Motorola claimed in some marketing literature that it executed some instructions 40% faster than a 68881 at the same clock speed, though this did not reflect typical performance, as seen by its more modest improvement in the table below. The 68882 is pin compatible with the 68881 and can be used as a direct replacement in most systems. The most important software incompatibility was that the 68882 used a larger FSAVE state frame, which affected UNIX and other preemptive multitasking OSes that had to be modified to allocate more space for it.
The 68881 or 68882 FPUs were used in the Sun 3 from Sun Microsystems, the Macintosh II family from Apple Computer, the NeXT Computer, the Amiga 3000 and the Atari Mega STE, TT, and Falcon030. Some[which?] third-party Amiga and Atari products used the 68881 or 68882 as a memory-mapped peripheral to the 68000.
- 155 000 transistors on-chip
- 16 MHz version ran at 160 kFLOPS
- 20 MHz version ran at 192 kFLOPS
- 25 MHz version ran at 240 kFLOPS
- 176 000 transistors on-chip
- 25 MHz version ran at 264 kFLOPS
- 33 MHz version ran at 352 kFLOPS
- 40 MHz version ran at 422 kFLOPS
- 50 MHz version ran at 528 kFLOPS
These statistics came from the comp.sys.m68k FAQ. No statistics are listed for the 16 MHz and 20 MHz 68882, though these chips were indeed produced.
Starting with the Motorola 68040, floating point support was included in the CPU itself.
- Sterling, Thomas; Anderson, Matthew; Brodowicz, Maciej (2017). High Performance Computing: Modern Systems and Practices. Morgan Kaufmann. p. 459. ISBN 978-0-12-420158-3.