ARM Cortex-A8

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ARM Cortex-A8
General information
Designed byARM Holdings
Common manufacturer(s)
Cache
L1 cache32 KiB/32 KiB
L2 cache512 KiB
Architecture and classification
Instruction setARMv7
Physical specifications
Cores
  • 1

The ARM Cortex-A8 is a processor core designed by ARM Holdings implementing the ARM v7 (32-bit) instruction set architecture.

Compared to the ARM11 core, the Cortex-A8 is a dual-issue superscalar design, achieving roughly twice the instructions executed per clock cycle. The Cortex-A8 was the first Cortex design to be adopted on a large scale for use in consumer devices.[1]

Features

Key features of the Cortex-A8 core are:

  • Frequency from 600 MHz to 1 GHz and above
  • Superscalar dual-issue microarchitecture
  • NEON SIMD instruction set extension [2]
  • VFPv3 Floating Point Unit
  • Thumb-2 instruction set encoding
  • Jazelle RCT (Also known as ThumbEE instruction set)
  • Advanced branch prediction unit with >95% accuracy
  • Integrated level 2 Cache (0–4 MiB)
  • 2.0 DMIPS/MHz

Chips

Several system-on-chips (SoC) have implemented the Cortex-A8 core, including:

See also

References

  1. ^ Gupta, Rahul (April 26, 2013). "ARM Cortex: The force that drives mobile devices". The Mobile Indian. Retrieved 2013-05-15.
  2. ^ Cortex-A8 Specification Summary; ARM Holdings.
  3. ^ "i.MX51 Applications Processor and Linux Hands on" (PDF).
  4. ^ "RK29XX".
  5. ^ "CX97255" (PDF).

External links

ARM Holdings