The following is a
partial list of Intel CPU microarchitectures. The list is not complete.
x86 microarchitectures [ edit ]
P5 (Pentium) 5
P6 (Pentium Pro) 14
P6 (Pentium 3)
NetBurst (Willamette) 20
NetBurst (Cedar Mill)
x86 processor; initially a temporary substitute for the iAPX 432 to compete with Motorola, Zilog, and National Semiconductor and to top the successful Z80.
186 Included a
DMA controller, interrupt controller, timers, and chip select logic.
x86 processor with protected mode.
32-bit x86 processor.
i486 Intel's second-generation of
32-bit x86 processors, included built in floating point unit and pipelining.
P5 Original Pentium microprocessors.
P6 Used in
Pentium Pro, Pentium II, Pentium II Xeon, Pentium III, and Pentium III Xeon microprocessors.
Pentium M Updated version of Pentium III's P6 microarchitecture designed from the ground up for mobile computing.
Enhanced Pentium M Updated, dual core version of the Pentium M microarchitecture used in Core microprocessors.
NetBurst Used in
Pentium 4, Pentium D, and some Xeon microprocessors. Commonly referred to as P7 although its internal name was P68 ( P7 was used for Itanium). Later revisions were the first to feature Intel's x86-64 architecture.
Core Rearchitected P6-based microarchitecture used in
Core 2 and Xeon microprocessors, built on a 65 nm process.
Penryn 45 nm shrink of the Core microarchitecture with larger cache, higher
FSB and clock speeds, and SSE4.1 instructions.
Nehalem Released November 17, 2008, built on a 45 nm process and used in the
Core i7, Core i5, Core i3 microprocessors. Incorporates the memory controller into the CPU die.
Westmere 32 nm shrink of the Nehalem microarchitecture with several new features.
Sandy Bridge Released January 9, 2011, built on a 32 nm process and used in the
Core i7, Core i5, Core i3 second generation microprocessors, and in Pentium B9XX and Celeron B8XX series. Formerly called Gesher but renamed in 2007.
Ivy Bridge 22 nm shrink of the Sandy Bridge microarchitecture released April 28, 2012.
Haswell New 22 nm microarchitecture, released June 3, 2013.
Broadwell 14 nm shrink of the Haswell microarchitecture, expected around 2014. Formerly called
Skylake Future Intel microarchitecture, based on a 14 nm process.
Cannonlake 10 nm shrink of the Skylake microarchitecture.
Multi-core in-order x86-64 updated version of P5 microarchitecture, with wide SIMD vector units and texture sampling hardware for use in graphics. Cores derived from this microarchitecture are called MIC (Many Integrated Core).
Bonnell 45 nm, low-power, in-order microarchitecture for use in
Saltwell 32 nm shrink of the Bonnell microarchitecture.
Silvermont 22 nm, out-of-order microarchitecture for use in Atom processors.
Airmont 14 nm shrink of the Silvermont microarchitecture.
Goldmont 14 nm Atom microarchitecture.
[2 ] [3 ]
Itanium microarchitectures [ edit ]
Merced microarchitecture Original Itanium microarchitecture. Used only in the first
McKinley microarchitecture Enhanced microarchitecture used in the first two generations of the
Itanium 2 microprocessor.
Montecito microarchitecture Enhanced
McKinley microarchitecture used in the Itanium 2 9000- and 9100-series of processors. Added dual core, coarse multithreading, and other improvements.
Tukwila microarchitecture Enhanced microarchitecture used in the Itanium 9300 series of processors. Added quad core, SMT, an integrated memory controller, QuickPath Interconnect, and other improvements.
Poulson microarchitecture Itanium processor featuring a new microarchitecture.
Kittson microarchitecture Future Itanium processors.
See also [ edit ]
References [ edit ]
External links [ edit ]