List of Intel CPU microarchitectures

The following is a partial list of Intel CPU microarchitectures. The list is not complete.

Intel CPU core roadmaps from NetBurst and P6 to Skylake

x86 microarchitectures

Microarchitecture	Pipeline stages
P5 (Pentium)	5
P6 (Pentium Pro)	14
P6 (Pentium 3)	10
NetBurst (Willamette)	20
NetBurst (Northwood)	20
NetBurst (Prescott)	31
NetBurst (Cedar Mill)	31
Core	14
Bonnell	16

8086

First x86 processor; initially a temporary substitute for the iAPX 432 to compete with Motorola, Zilog, and National Semiconductor and to top the successful Z80.

186

Included a DMA controller, interrupt controller, timers, and chip select logic.

286

First x86 processor with protected mode.

i386

First 32-bit x86 processor.

i486

Intel's second-generation of 32-bit x86 processors, included built in floating point unit and pipelining.

P5

Original Pentium microprocessors.

P6

Used in Pentium Pro, Pentium II, Pentium II Xeon, Pentium III, and Pentium III Xeon microprocessors.

Pentium M

Updated version of Pentium III's P6 microarchitecture designed from the ground up for mobile computing.

Enhanced Pentium M

Updated, dual core version of the Pentium M microarchitecture used in Core microprocessors.

NetBurst

Used in Pentium 4, Pentium D, and some Xeon microprocessors. Commonly referred to as P7 although its internal name was P68 (P7 was used for Itanium). Later revisions were the first to feature Intel's x86-64 architecture.

Core

Rearchitected P6-based microarchitecture used in Core 2 and Xeon microprocessors, built on a 65 nm process.

Penryn

45 nm shrink of the Core microarchitecture with larger cache, faster FSB and clock speeds, and SSE4.1 instructions.

Nehalem

Released 2008-11-17, built on a 45 nm process and used in the Core i7, Core i5, Core i3 microprocessors.

Westmere

32 nm shrink of the Nehalem microarchitecture with several new features.

Sandy Bridge

Released 2011-01-09, built on a 32 nm process and used in the Core i7, Core i5, Core i3 second generation microprocessors. Formerly called Gesher but renamed in 2007.

Ivy Bridge

22 nm shrink of the Sandy Bridge microarchitecture, expected around 2012.

Haswell

Future Intel microarchitecture, expected around 2013, based on a 22 nm process.

Broadwell

14 nm shrink of the Haswell microarchitecture, expected around 2014. Formerly called Rockwell.

Skylake

Future Intel microarchitecture, based on a 14 nm process.

Skymont

10 nm shrink of the Skylake microarchitecture.

Larrabee

Multi-core in-order x86-64 updated version of P5 microarchitecture, with wide SIMD vector units and texture sampling hardware for use in graphics.

Bonnell

Low-power, in-order microarchitecture for use in Atom processors.

Itanium microarchitectures

Merced microarchitecture

Original Itanium microarchitecture. Used only in the first Itanium microprocessors.

McKinley microarchitecture

Enhanced microarchitecture used in the first two generations of the Itanium 2 microprocessor.

Montecito microarchitecture

Enhanced McKinley microarchitecture used in the Itanium 2 9000- and 9100-series of processors. Added dual core, coarse multithreading, and other improvements.

Tukwila microarchitecture

Enhanced microarchitecture used in the Itanium 9300 series of processors. Added quad core, SMT, an integrated memory controller, QuickPath Interconnect, and other improvements.

Poulson microarchitecture

Future Itanium processor said to feature a new microarchitecture.

See also

• List of AMD CPU microarchitectures
• Marvell Technology Group XScale microarchitecture
• Intel Tick-Tock

External links

• Intel Automated Relational Knowledgebase