128-bit computing

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In computer architecture, 128-bit integers, memory addresses, or other data units are those that are 128 bits (16 octets) wide. Also, 128-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size.

While there are currently no mainstream general-purpose processors built to operate on 128-bit integers or addresses, a number of processors do have specialized ways to operate on 128-bit chunks of data. The IBM System/370 could be considered the first simple 128-bit computer, as it used 128-bit floating-point registers. Most modern CPUs feature single-instruction multiple-data (SIMD) instruction sets (Streaming SIMD Extensions, AltiVec etc.) where 128-bit vector registers are used to store several smaller numbers, such as four 32-bit floating-point numbers. A single instruction can then operate on all these values in parallel. However, these processors do not operate on individual numbers that are 128 binary digits in length; only their registers have the size of 128 bits.

The DEC VAX supported operations on 128-bit integer ('O' or octaword) and 128-bit floating-point ('H-float' or HFLOAT) datatypes. Support for such operations was an upgrade option rather than being a standard feature. Since the VAX's registers were 32 bits wide, a 128-bit operation used four consecutive registers or four longwords in memory.

The ICL 2900 Series provided a 128-bit accumulator, and its instruction set included 128-bit floating-point and packed decimal arithmetic.

In the same way that compilers emulate e.g. 64-bit integer arithmetic on architectures with register sizes less than 64 bits, some compilers also support 128-bit integer arithmetic. For example, the GCC C compiler 4.6 and later has a 128-bit integer type __int128 for some architectures.[1] GCC and compatible compilers signal the presence of 128-bit arithmetic when the macro __SIZEOF_INT128__ is defined.[2] For the C programming language, 128-bit support is optional, e.g. via the int128_t type, or it can be implemented by a compiler-specific extension. The Rust programming language has built-in support for 128-bit integers, which is implemented on all platforms.[3] A 128-bit type provided by a C compiler can be available in Perl via the Math::Int128 module.[4]

A 128-bit register can store 2128 (over 3.40 × 1038) different values. The range of integer values that can be stored in 128 bits depends on the integer representation used. With the two most common representations, the range is 0 through 340,282,366,920,938,463,463,374,607,431,768,211,455 (2128 − 1) for representation as an (unsigned) binary number, and −170,141,183,460,469,231,731,687,303,715,884,105,728 (−2127) through 170,141,183,460,469,231,731,687,303,715,884,105,727 (2127 − 1) for representation as two's complement.



A 128-bit multicomparator was described by researchers in 1976.[9]

A CPU with 128-bit multimedia extensions was designed by researchers in 1999.[10]


  1. ^ "GCC 4.6 Release Series - Changes, New Features, and Fixes". Retrieved 25 July 2016.
  2. ^ Marc Glisse (26 August 2015). "128-bit integer - nonsensical documentation?". GCC-Help. Retrieved 23 January 2020.
  3. ^ "i128 - Rust". doc.rust-lang.org. Retrieved 25 June 2020.
  4. ^ "Math::Int128". metacpan.org. Retrieved 25 June 2020.
  5. ^ Woligroski, Don (24 July 2006). "The Graphics Processor". Tom's Hardware. Archived from the original on 11 April 2013. Retrieved 24 February 2013.
  6. ^ Miller, Rich (4 May 2010). "Digital Universe nears a Zettabyte". Data Center Knowledge. Archived from the original on 6 May 2010. Retrieved 16 September 2010.
  7. ^ Kleppmann, Martin (24 January 2013). "Re: Synchronization Markers". Archived from the original on 27 September 2015.
  8. ^ "Apache Avro 1.8.0 Specification". Apache Software Foundation.
  9. ^ Mead, Carver A.; Pashley, Richard D.; Britton, Lee D.; Daimon, Yoshiaki T.; Sando, Stewart F., Jr. (October 1976). "128-Bit Multicomparator" (PDF). IEEE Journal of Solid-State Circuits. 11 (5): 692–695. Bibcode:1976IJSSC..11..692M. doi:10.1109/JSSC.1976.1050799. Archived (PDF) from the original on 3 November 2018.
  10. ^ Suzuoki, M.; Kutaragi, K.; Hiroi, T.; Magoshi, H.; Okamoto, S.; Oka, M.; Ohba, A.; Yamamoto, Y.; Furuhashi, M.; Tanaka, M.; Yutaka, T.; Okada, T.; Nagamatsu, M.; Urakawa, Y.; Funyu, M.; Kunimatsu, A.; Goto, H.; Hashimoto, K.; Ide, N.; Murakami, H.; Ohtaguro, Y.; Aono, A. (November 1999). "A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder". IEEE Journal of Solid-State Circuits. 34 (11): 1608–1618. Bibcode:1999IJSSC..34.1608S. doi:10.1109/4.799870.