An illustration of the Wii U MCM without heat spreader. The smaller chip, lower right, is the "Espresso" CPU made by IBM. The other chips are the "Latte" GPU (large chip) from AMD and an EEPROM chip (tiny) from Renesas.
|Produced||From 2012 to January 31, 2017|
|Designed by||IBM, Nintendo IRD, NTD|
|Max. CPU clock rate||1.243 GHz|
|Min. feature size||45 nm|
|Instruction set||PowerPC 1.1|
|Microarchitecture||Not verified by Nintendo|
|L2 cache||1× 2 MB, 2× 512 KB (on-die)|
|Last level cache||3|
|GPU||AMD Radeon-based "Latte"|
|Application||Embedded (Wii U)|
|POWER, PowerPC, and Power ISA architectures|
|Freescale (formerly Motorola)|
|Cancelled in gray, historic in italic|
Espresso is the codename of the 32-bit central processing unit (CPU) used in Nintendo's Wii U video game console. It was designed by IBM, and was produced using a 45 nm silicon-on-insulator process. The Espresso chip resides together with a GPU from AMD on a MCM manufactured by Renesas. It was revealed at E3 2011 in June 2011 and released in November 2012.
IBM and Nintendo have revealed that the Espresso processor is a PowerPC-based microprocessor with three cores on a single chip to reduce power consumption and increase speed. The CPU and the graphics processor are placed on a single substrate as a multi-chip module (MCM) to reduce complexity, increase the communication speed between the chips, further reduce power consumption and reduce cost and space required. The two chips were assembled to the complete MCM by Renesas in Japan. Espresso itself was manufactured by IBM in its 300 mm plant in East Fishkill, New York, using 45 nm SOI-technology and embedded DRAM (eDRAM) for caches.
While unverified by Nintendo, hackers, teardowns, and unofficial informants have since revealed more information about the Espresso, such as its name, size and speed. The microarchitecture seems to be quite similar to its predecessors the Broadway and Gekko, i.e. PowerPC 750 based, but enhanced with larger and faster caches and multiprocessor support.
Rumors that the Wii U CPU was derived from IBM's high-end POWER7 server processor proved false. Espresso shares some technology with POWER7, such as eDRAM and general instruction set similarities, but those are superficial similarities.
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- Out-of-order execution PowerPC based cores
- 45 nanometer process technology
- IBM silicon on insulator (SOI) technology
- Backward compatible with the Broadway and Gekko processors
- Broadway-based core architecture
- Three cores at 1.243125 GHz
- Symmetric multiprocessing with MESI/MERSI support
- Each core can output up to 4 instructions per clock using superscalar parallelism.
- 32-bit integer unit
- 64-bit floating-point (or 2× 32-bit SIMD, often found under the denomination "paired singles")
- A total of 3 MB of Level 2 cache in an unusual configuration.
- Core 0: 512 KB, core 1: 2 MB, core 2: 512 KB
- 4 stage pipeline 
- 7 stage pipeline - FP
- 6 Execution Units per core (18 EUs total)
- Die size: 4.74 mm × 5.85 mm = 27.73 mm2
- Iwata asks: Wii U: The Console
- NEW WII U™ ON SOI Archived 2016-03-25 at the Wayback Machine
- World Exclusive: Wii U Final Specs
- Nintendo Wii U Teardown - AnandTech.com
- Nintendo Wii U Teardown - iFixit.com
- Wii U has 1.24GHz CPU, 550MHz graphics core
- Wii U CPU, GPU Details Uncovered
- IBM puts Watson's brains in Nintendo Wii U
- IBM teases on Wii U CPU specs
- Rumored Wii U Specs Raising Eyebrows... for the Wrong Reasons
- IBM reconfirms the Wii U/Watson connection
- IBM Confirms WII U Utilizes Power-Based CPU, Not Power 7
- Joel Hruska (November 29, 2012). "Hackers Discover Wii U's Processor Design and Clock Speed". HotHardware. Retrieved January 21, 2014.
- @marcan42, Twitter - 2012-12-09
- @marcan42, Twitter - 2013-11-23
- @marcan42, Twitter - 2013-01-30
- IBM PowerPC 750CL Microprocessor Revision Level DD2.x Datasheet