Yonah (microprocessor): Difference between revisions
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Intel 64 (Intel's [[x86-64]] implementation) is not supported by Yonah. However, Intel 64 support is integrated in Yonah's successor, the mobile version of [[Intel Core 2|Core 2]], code-named Merom. |
Intel 64 (Intel's [[x86-64]] implementation) is not supported by Yonah. However, Intel 64 support is integrated in Yonah's successor, the mobile version of [[Intel Core 2|Core 2]], code-named Merom. |
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'''Intel Core Duo''' (product code 80539) consists of two cores on one die, a 2 [[ |
'''Intel Core Duo''' (product code 80539) consists of two cores on one die, a 2 [[Megabyte|MB]] L2 cache shared by both cores, and an arbiter bus that controls both L2 cache and FSB access. Upcoming steppings of Core Duo processors will also include the ability to disable one core to conserve power. |
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'''Intel Core Solo''' (product code 80538) uses the same two-core die as the Core Duo, but features only one ''active'' core. This allows Intel to sell dies that have a manufacturing defect in one but not both of the cores. Depending on demand, Intel may also simply disable one of the cores to sell the chip at the Core Solo price -- this requires less effort than launching and maintaining a separate line of CPUs that physically only have one core. Intel used the same strategy previously with the [[486]] CPU in which early [[486SX]] CPUs were in fact manufactured as [[486DX]] CPUs but the [[Floating point unit|FPU]] failed quality control and the connection was physically severed. |
'''Intel Core Solo''' (product code 80538) uses the same two-core die as the Core Duo, but features only one ''active'' core. This allows Intel to sell dies that have a manufacturing defect in one but not both of the cores. Depending on demand, Intel may also simply disable one of the cores to sell the chip at the Core Solo price -- this requires less effort than launching and maintaining a separate line of CPUs that physically only have one core. Intel used the same strategy previously with the [[486]] CPU in which early [[486SX]] CPUs were in fact manufactured as [[486DX]] CPUs but the [[Floating point unit|FPU]] failed quality control and the connection was physically severed. |
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=== Technical specifications === |
=== Technical specifications === |
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Core Duo contains 151 million [[transistor]]s, including the shared 2 [[ |
Core Duo contains 151 million [[transistor]]s, including the shared 2 [[MB]] [[L2 cache]]. Yonah's execution core contains a 12 stage [[Pipeline (computer)|pipeline]], forecast to eventually be able to run at a maximum frequency of 2.33–2.50 GHz. The communication between the L2 cache and both execution cores is handled by a [[Databus#Second generation|bus unit controller]] through arbitration, which reduces cache coherency traffic over the [[front side bus|FSB]], at the expense of raising the core-to-L2 latency from 10 clock cycles (in the Dothan Pentium M) to 14 clock cycles. The increase in clock frequency offsets the impact of the increased clock cycle latency. The power management components of the core features improved grained thermal control, as well as independent scaling of power between the two cores, resulting in very efficient management of power. |
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Core processors communicate with the system chipset over a 667 MT/s [[front side bus]] (FSB), up from 533 MT/s used by the fastest Pentium M. |
Core processors communicate with the system chipset over a 667 MT/s [[front side bus]] (FSB), up from 533 MT/s used by the fastest Pentium M. |
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The successor to Core is the mobile version of the [[Intel Core 2]] line of processors using cores based upon the [[Intel Core microarchitecture]], released on [[July 27]], [[2006]]. The release of the mobile version of Intel Core 2 marks the reunification of Intel's desktop and mobile product lines as Core 2 processors were released for desktops and notebooks, unlike the first Intel Core CPUs that were targeted only for notebooks (although some small form factor and all-in-one desktops, like the [[iMac]], also used Core processors). |
The successor to Core is the mobile version of the [[Intel Core 2]] line of processors using cores based upon the [[Intel Core microarchitecture]], released on [[July 27]], [[2006]]. The release of the mobile version of Intel Core 2 marks the reunification of Intel's desktop and mobile product lines as Core 2 processors were released for desktops and notebooks, unlike the first Intel Core CPUs that were targeted only for notebooks (although some small form factor and all-in-one desktops, like the [[iMac]], also used Core processors). |
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Unlike the Intel Core, Intel Core 2 is a 64-bit processor, supporting Intel 64. Another difference between the original Core Duo and the new Core 2 Duo is an increase in the amount of Level 2 cache. The new Core 2 Duo has doubled the amount of on-board cache to 4 [[ |
Unlike the Intel Core, Intel Core 2 is a 64-bit processor, supporting Intel 64. Another difference between the original Core Duo and the new Core 2 Duo is an increase in the amount of Level 2 cache. The new Core 2 Duo has doubled the amount of on-board cache to 4 [[MB]]. Both chips have a 65 nm process technology architecture and support a 667-1333 MHz front-side-bus (FSB). |
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==See also== |
==See also== |
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Revision as of 13:54, 17 January 2008
| File:Intel Core Duo.png | |
| General information | |
|---|---|
| Launched | 2006 - |
| Common manufacturer |
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| Performance | |
| Max. CPU clock rate | 533 MHz to 2.33 GHz |
| FSB speeds | 337 MT/s to 800 MT/s |
| Architecture and classification | |
| Technology node | 0.065 |
| Microarchitecture | P6 (Pentium M) derivative |
| Instruction set | x86 |
| Physical specifications | |
| Cores |
|
| Socket |
|
| Products, models, variants | |
| Core name |
|
 | This article needs additional citations for verification. (december, 2007) |
The Core brand refers to Intel's 32-bit mobile dual-core x86 CPUs that derived from the Pentium M branded processors. The Core's microarchitecture was a slightly more advanced version of the Intel P6 architecture, that was eventually superseded by the new Core 2 microarchitecture. It emerged in parallel with the NetBurst (Intel P68) microarchitecture of the Pentium 4 brand, and was a precursor of the 64-bit Core microarchitecture of Core 2 branded CPUs. The Core comprised two branches: the Duo (dual-core) and Solo (Duo with one disabled core, which replaced the Pentium M brand of single-core mobile processor).
The Core brand was launched on January 5 2006 by the release of the 32-bit Yonah core CPU - Intel's first dual-core mobile (low-power) processor. Its dual-core closely resembled two interconnected Pentium M branded CPUs packaged as a single die (piece) silicon chip (IC). Hence, the 32-bit microarchitecture of Core branded CPUs - contrary to its name - had more in common with Pentium M branded CPUs than with the following 64-bit Core microarchitecture of Core 2 branded CPUs. Despite a major rebranding effort by Intel starting January 2006, some computers with the Yonah core continued to be marked as Pentium M.
In 2007, Intel began branding the Yonah core CPUs as Pentium Dual-Core intended for lower-end mobile only computers, unlike the 64-bit Core microarchitecture CPUs branded as Intel Core 2 Duo (for higher-end computers) and also as Pentium Dual-Core (for lower-end desktops only). In short, the Core brand refers to processors with the "mobile" derivative of 32-bit Intel P6 microarchitecture (preceding the Core microarchitecture), whereas the Intel Core 2 Duo brand refers to CPUs with the 64-bit Core microarchitecture.
September 2006 and January 4, 2008 mark a discontinuation of many Core branded CPUs.[1][2]
Yonah
Yonah was the code name for (the core of) Intel's first generation of 65 nm process mobile microprocessors, based on the Banias/Dothan-core Pentium M microarchitecture. SIMD performance has been improved through the addition of SSE3 instructions and improvements to SSE and SSE2 implementations, while integer performance decreased slightly due to higher latency cache. Additionally, Yonah includes support for the NX bit.
The Intel Core Duo brand refers to the world's first low-power (less than 25 watts) Yonah dual-core microprocessor, with the previous low being AMD's Opteron 260 and 860 HE at 55 watts. Core Duo was released on 5 January 2006, with the other components of the Napa platform. It was the first Intel processor to be used in Apple Macintosh products (although the Apple Developer Transition Kit machines, non-production units distributed to some developers, used Pentium 4 processors).[3]
Contrary to early reports, the Intel Core Duo supports Intel VT x86 virtualization technology, except in the T2300E model and proprietary T2050/T2150/T2250 mounted by OEMs (cf. the Intel Centrino Duo Mobile Technology Performance Brief and Intel's Processor Number Feature Table). The Intel Pentium Dual Core processors may or may not have this feature. However, it seems some vendors, like HP, have chosen to disable this feature,[4][5] with others making it available through a BIOS option.[citation needed]
Intel 64 (Intel's x86-64 implementation) is not supported by Yonah. However, Intel 64 support is integrated in Yonah's successor, the mobile version of Core 2, code-named Merom.
Intel Core Duo (product code 80539) consists of two cores on one die, a 2 MB L2 cache shared by both cores, and an arbiter bus that controls both L2 cache and FSB access. Upcoming steppings of Core Duo processors will also include the ability to disable one core to conserve power.
Intel Core Solo (product code 80538) uses the same two-core die as the Core Duo, but features only one active core. This allows Intel to sell dies that have a manufacturing defect in one but not both of the cores. Depending on demand, Intel may also simply disable one of the cores to sell the chip at the Core Solo price -- this requires less effort than launching and maintaining a separate line of CPUs that physically only have one core. Intel used the same strategy previously with the 486 CPU in which early 486SX CPUs were in fact manufactured as 486DX CPUs but the FPU failed quality control and the connection was physically severed.
Technical specifications
Core Duo contains 151 million transistors, including the shared 2 MB L2 cache. Yonah's execution core contains a 12 stage pipeline, forecast to eventually be able to run at a maximum frequency of 2.33–2.50 GHz. The communication between the L2 cache and both execution cores is handled by a bus unit controller through arbitration, which reduces cache coherency traffic over the FSB, at the expense of raising the core-to-L2 latency from 10 clock cycles (in the Dothan Pentium M) to 14 clock cycles. The increase in clock frequency offsets the impact of the increased clock cycle latency. The power management components of the core features improved grained thermal control, as well as independent scaling of power between the two cores, resulting in very efficient management of power.
Core processors communicate with the system chipset over a 667 MT/s front side bus (FSB), up from 533 MT/s used by the fastest Pentium M. New T2050 & T2250 have also appeared in OEM systems as a low-cost option with a lower 533 MHz FSB and no Virtualization Technology. No official data on these processors is yet available from Intel.
Yonah is supported by the 945GM, 945PM, 945GT, 965GM, 965PM, and 965GT system chipsets. Core Duo and Core Solo use Socket M, but due to pin arrangement and new chipset functions are not compatible with any previous Pentium M motherboard.
The T2300E was later introduced as a replacement for the T2300. It has dropped support for Virtualization Technology. Early Intel specifications mistakenly claimed a halving of the Thermal Design Power.
Advantages and shortcomings
The Duo version of Intel Core (Yonah) includes two computational cores, providing performance per watt almost as good as any previous single core Intel processors. In battery-operated devices such as notebook computers, this translates to getting as much total work done per battery charge as with older computers, although the same total work may be done faster. When parallel computations and multiprocessing are able to utilize both cores, the Intel Core Duo delivers much higher peak speed compared to the single-core chips previously available for mobile devices.
The shortcomings of Intel Core (Yonah) are:
- The same or even slightly worse "performance per watt" in single threaded or non-parallel applications compared to its predecessor.
- 32-bit processes only. 64-bit processes are not supported. (See the Intel Core 2 successor, which is a 64-bit processor.)
- High memory latency due to the lack of on-die memory controller (further aggravated by system-chipset's use of DDR-II RAM)
- Limited Floating Point Unit (multiply/divide) throughput for non-parallel computations or single-threaded processes; this is due to the smaller number of floating-point units in each CPU core compared to some previous designs.
The Yonah platform requires all main-memory transactions to pass through the Northbridge of the chipset, increasing latency compared to the AMD's Turion platform. However, application tests showed Intel Core's L2-cache system is quite effective at overcoming main-memory latency; despite this limitation, Intel Core (Yonah) sometimes managed to outperform AMD's Turion.
The Sossaman processor for servers, which is based on Yonah, also lacks Intel 64-bit support. For the server market, this had more severe consequences, since all major server operating systems already supported x86-64, and Microsoft Exchange Server 2007 even requires a 64-bit processor to run.
According to Mobile Roadmaps from 2005, Intel's Yonah project originally focused more on reducing the power consumption of its p6+ Pentium M-based processor and aimed to reduce it by 50% for Intel Core (Yonah). Intel continued recommending Pentium NetBurst-based processors for mobile high performance applications (although these were less power efficient) until the Yonah project succeeded in extracting higher performance from its lower-power-consumption design. The Intel Core Duo's inclusion of two highly-efficient cores on one chip can provide better performance than a Pentium NetBurst core, but with much better power-efficiency. Intel no longer recommends its Pentium Netburst-based processors for mobile devices.
On July 27, 2006, Intel's Core 2 processors were released. By 2Q 2007, Intel expected 90% of its laptop CPU production to be converted to the heavily-revised Intel Core 2 processors. The original Intel Core (Yonah) product had an unusually short lifespan as a stepping stone to the 64-bit Intel Core 2.
Non-Core Yonah variants
There were two variants and one derivative of the Yonah, which did not bear the "Intel Core" brand name. A dual-core (server) derivative, code-named Sossaman, was released on 14 March 2006 as the Xeon (branded) LV (low-voltage). The Sossaman differed from the Yonah only in its support for dual-socket configurations (two CPUs - i.e. four cores - on board, like AMD Quad FX), and implementation of 36-bit memory addressing (PAE mode). A single-core variant, code-named Yonah-1024, was released as the Celeron (branded) M 400 series CPUs. It was largely identical to the Core Solo branded Yonah, except that it only had half the L2 cache and did not support SpeedStep. Another dual-core variant of the Core Duo branded Yonah was released as the Intel Pentium Dual-Core branded T2060, T2080, and T2130 mobile CPUs.
Core successor
The successor to Core is the mobile version of the Intel Core 2 line of processors using cores based upon the Intel Core microarchitecture, released on July 27, 2006. The release of the mobile version of Intel Core 2 marks the reunification of Intel's desktop and mobile product lines as Core 2 processors were released for desktops and notebooks, unlike the first Intel Core CPUs that were targeted only for notebooks (although some small form factor and all-in-one desktops, like the iMac, also used Core processors).
Unlike the Intel Core, Intel Core 2 is a 64-bit processor, supporting Intel 64. Another difference between the original Core Duo and the new Core 2 Duo is an increase in the amount of Level 2 cache. The new Core 2 Duo has doubled the amount of on-board cache to 4 MB. Both chips have a 65 nm process technology architecture and support a 667-1333 MHz front-side-bus (FSB).
See also
External links
- Intel Core Duo Web page
- Intel Core Solo Web page
- Processor comparison table
- Intel Core technical specifications
- techPowerUp! CPU Database
- Tested against AMD's 64 X2 line and Intel's own Pentium M
- Intel® Centrino® Duo Mobile Technology papers
References
- ^ "Intel to discontinue older Centrino CPUs in Q1 08". TG Daily. Retrieved 2007-10-01.
- ^ "Intel already phasing out first quad-core CPU". TG Daily. Retrieved 2007-09-07.
- ^ Marsal, Katie (2005-06-23). "Inside Apple's Intel-based Dev Transition Kit (Photos)". AppleInsider. Retrieved 2007-06-13.
{{cite news}}: Check date values in:|date=(help) - ^ "HP Disables VT On Some Intel Laptops". Slashdot. 2007-01-16. Retrieved 2007-06-13.
{{cite news}}: Check date values in:|date=(help) - ^ Persson, Jana (2006-08-15). "nw8440 - VT disabled in bios". Hewlett-Packard. Retrieved 2007-06-13.
{{cite web}}: Check date values in:|date=(help)