Direct Media Interface
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In computing, Direct Media Interface (DMI) is Intel's proprietary link between the northbridge and southbridge on a computer motherboard. It was first used between the 9xx chipsets and the ICH6, released in 2004. Previous Intel chipsets had used the Hub Interface to perform the same function. Server chipsets use a similar interface called Enterprise Southbridge Interface (ESI).
DMI shares many characteristics with PCI Express, using multiple lanes and differential signaling to form a point-to-point link. Most implementations use a ×4 link, while some mobile systems (e.g. 915GMS, 945GMS/GSE/GU and the Atom N450) use a ×2 link, halving the bandwidth. The original implementation provides 10 Gbit/s each direction (using a ×4 link).
While the interface has been called DMI since the ICH6, Intel specifies the specific combinations of devices that interwork, so the presence of a DMI interface does not itself guarantee that a particular northbridge is compatible with a particular southbridge.
DMI 2.0, introduced in 2011, doubles the transfer rate to 20 Gbit/s with a ×4 link. It is used to link an Intel CPU with the Intel Platform Controller Hub (PCH), which supersedes the historic northbridge/southbridge implementation.:14
DMI 3.0, promising speeds of up to 8 GT/s, will be used by two-chip variants of the upcoming Intel Skylake microprocessors, which will be used in conjunction with Intel 100 Series chipsets; some variants of Skylake will have the PCH integrated onto the die effectively following a system-on-chip (SoC) design layout.
|Version||Rate (transfer/s)||Rate (bit/s)||Rate (byte/s)||Year|
|1.0||2 GT/s||10 Gbit/s||1 GB/s||2004|
|2.0||4 GT/s||20 Gbit/s||2 GB/s||2011|
|3.0||8 GT/s||40 Gbit/s||4 GB/s||2015|
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If an unrecoverable error occurs on an I/O bus, a System Error message (SERR DMI msg) will be sent via the DMI.
The following northbridge devices support a northbridge DMI:
The following processors support a northbridge DMI and therefore do not use a separate northbridge:
The following processors support a northbridge DMI 2.0 and therefore do not use a separate northbridge:
The following southbridge devices support a southbridge DMI:
The following southbridge devices support a PCH DMI 2.0:
- Intel Z68
- Intel P67
- Intel H67
- Intel H61
- Intel Q67
- Intel Q65
- Intel B65
- Intel HM65
- Intel HM67
- Intel QM67
- Intel QS67
- Intel Z77
- Intel Z75
- Intel H77
- Intel Q77
- Intel Q75
- Intel B75
- Intel X79
- Intel HM75
- Intel HM76
- Intel HM77
- Intel UM77
- Intel QM77
- Intel QS77
- Intel Z87
- Intel H87
- Intel H81
- Intel Q87
- Intel Q85
- Intel B85
- Intel Z97
- Intel H97
- Intel X99
- "Intel 5520 Chipset and Intel 5500 Chipset Datasheet" (PDF). Intel. March 2009. Retrieved 2014-11-06.
- "Desktop 3rd Generation Intel Core Processor Family, Desktop Intel Pentium Processor Family, and Desktop Intel Celeron Processor Family: Datasheet - Volume 1 of 2" (PDF). External Design Specification (EDS). Intel. November 2013. Retrieved 2014-01-28.
- Gennadiy Shvets (2014-06-26). "More details on Skylake processors". cpu-world.com. Retrieved 2014-07-01.