Comparison of EDA software
 | This article has multiple issues. Please help improve it or discuss these issues on the talk page. (Learn how and when to remove these template messages)
|
Comparison of Electronic design automation (EDA) software
Free and open-source software
| Name | Architecture | License | Autorouter | Comment |
|---|---|---|---|---|
| Electric | *BSD, Java | GPL | Yes | VLSI circuit design tool with connectivity at all levels. Can also be used for schematic entry and PCB design. |
| FreePCB | w32 | GPL | Yes | A printed circuit board design program for Microsoft Windows. FreePCB allows for up to 16 copper layers, both metric and US customary units, and export of designs in Gerber format. Boards can be partially or fully autorouted with the FreeRouting[1] autorouter by using the FpcROUTE Specctra DSN design file translator. |
| Fritzing | Windows, Mac, Linux | GPL | Yes | Protoboard view, schematic view, PCB view, Code (firmware) view. Includes customizable design rule checker. Includes common shaped boards like Arduino and Raspberry Pi shields. Allows spline curve traces. Only two layers (top and bottom). Outputs gerbers. |
| gEDA | *BSD, Linux, Mac | GPL | Yes | schematic, simulation, PCB editor, gerber view |
| Gnucap | any (C++98) | GPL3 | Mixed-signal circuit simulator | |
| Icarus Verilog | *BSD, Linux, Mac | GPL | Verilog simulator | |
| KiCad | *BSD, Windows, Linux, Mac | GNU GPL | Built-in, or FreeRouting | Full package for schematic and board design, etc. Design rule checking. User-defined symbols and footprints. Gerber/ drill file creation. Graphic interface. Active user community. |
| KTechLab | Linux | GPL | n/a | KTechLab is a schematic capture and simulator. It is specifically geared toward mixed signal simulation of analog components and small digital processors. |
| Magic | Linux | BSD license | no | A popular very-large-scale integration layout tool |
| Ngspice | Linux, Solaris, Mac, NetBSD, FreeBSD, w32 | BSD | SPICE + XSPICE + Cider | |
| Oregano | GPL | no | Schematic capture + spice simulation | |
| Quite Universal Circuit Simulator (QUCS) | Linux, Solaris, Mac, NetBSD, FreeBSD, w32 | GPL | Schematic capture + Verilog + VHDL + simulation | |
| pcb-rnd | *BSD, Linux, Mac | GPL | yes | Circuit layout program with extended file format support, DRC, parametric footprints, query langauge, and gui and command line operation for batch processing and automation |
| Verilator | Posix | GPL | Verilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog into cycle accurate C++ or SystemC code following 2-state synthesis (zero delay) semantics. Benchmarks reported on its website suggest it is several times faster than commercial event driven simulators such as ModelSim, NC-Verilog and VCS, while not quite as fast as commercial cycle accurate modeling tools such as Carbon ModelStudio and ARC VTOC. | |
| XCircuit | Unix | GPL | Used to produce netlists and publish high-quality drawings. |
Comparison of EDA packages
| Application and developer | Latest version/release + date | Schematic? | Simulation? | PCB editing? | Runs on POSIX style systems? | Runs on Windows? | Other platforms? | Open source? |
User Interface Language(s) | Imports | Exports | Scripting support |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Advanced Design System by Keysight EEsof EDA | 2016.01 28 January 2016[2] |
Yes | Yes | Yes | Yes[3] | Yes[3] | SuSE, RHEL[3] | No | en | HSPICE, SPICE, Spectre netlists; Gerber, Excellon, ODB++, artwork; more | HSPICE, SPICE, Spectre netlists; Gerber, Excellon, ODB++, artwork; more | Python, Application Extension Language (proprietary; "AEL") |
| Active-HDL by Aldec | 10.3 16 March 2016 |
Yes | Yes | No | No | Yes | No | No | en | EDIF, Viewlogic, more | PDF, HTML, Verilog, VHDL, EDIF, Zuken, more | |
| Altium Designer (former Protel) by Altium | 18.1 26 April 2018 |
Yes | Yes | Yes | No | Yes | Wine | No | Multilingual | OrCAD, Allegro, PADS Logic, PADS PCB, Expedition, DxDesigner, EAGLE, Gerber, STEP, Solidworks, IDF, more | 3D PDF, Gerber, Gerber X2, Excellon, ODB++, DXF, STEP, OrCAD, EAGLE, more | Delphi, JS, VB |
| CADSTAR, Board Designer, and Visula by Zuken | 18 30 June 2017 |
Yes | Yes, Spice | Yes | No | Yes | No | No | en | PADS, OrCAD, P-CAD, Protel, DXF, IDF | PDF, Gerber, Excellon, ODB++, DXF, IDF more | |
| CircuitLogix by Logic Design Inc. | Release 9.1 January 2013 |
Yes | Yes | Yes | No | Yes | No | No | en | SPICE, Gerber, DXF | SPICE, PDF, Gerber, DXF | |
| CircuitMaker by Altium | 1.3.0.119 August 2016 |
Yes | No | Yes | No | Yes | Wine | No | en | AD09, AD10, AD12, PADS, P-CAD, OrCAD, Protel, EAGLE, DXF | Gerber, Excellon, DXF, STEP, more | |
| CircuitStudio by Altium | 1.5.1.13 25 May 2018 |
Yes | Yes | Yes | No | Yes | Wine | No | en | AD09, AD10, AD12, PADS, P-CAD, OrCAD, Protel, EAGLE, DXF | Gerber, Excellon, SPICE, DXF, STEP, more | |
| CR-5000 by Zuken | 13 17 May 2011 |
Yes | Yes, SI & PI | Yes | Yes | Yes | Unix, Linux | No | en, jp | EDIF, DXF, IGES, IDF, BSDL, STEP, ACIS, Gerber, Excellon, more | PDF, Gerber, Excellon, ODB++ (must request[4]), DXF, STEP, IPC D-356, IPC-2581, EPS, ACIS | |
| DipTrace by Novarm | 3.2.0.1 1 November 2017 |
Yes | External (Spice netlist export) |
Yes | Yes | Yes | Mac, Wine | No | 21 languages | EAGLE, Altium, P-CAD, PADS, OrCAD, Gerber, N/C Drill, DXF, BSDL Pinlist, Netlists | Gerber, Gerber X2, Excellon, ODB++, DXF, P-CAD, PADS, OrCAD, IPC-D-356, STEP, VRML, Pick and Place, CSV, BOM | |
| DesignSpark PCB from RS Components | 8 16 June 2016 |
Yes | Yes, Spice | Yes | No | Yes | No | No | Various | EAGLE, DXF, EDIF | Gerber, Excellon, ODB++, DXF, IDF, PDF, LPKF | |
| EAGLE by Autodesk/CadSoft Computer | 9.1.3 15 August 2018 |
Yes | Ngspice, LTspice, PCBSim |
Yes | Yes | Yes | Linux, Mac | No | de, en, zh, hu, ru | EAGLE (XML), ACCEL (P-CAD, Altium, Protel), ULTIBOARD, Netlists, BMP, Custom | EAGLE (XML), Protel, Netlists, Images, Gerber, Gerber X2, Excellon, Sieb & Meyer, HPGL, PostScript/EPS, PDF, Images, HyperLynx, IDF, Custom | Proprietary User Language Programming (ULP) |
| EasyEDA | 5.4.12 7 May 2018 |
Yes | Ngspice | Yes | Yes | Yes | Linux, Mac | No | en, fr, de, pl, jp, ru, es, se, ua, zh ... | Altium, Eagle, Kicad libraries, LTspice .asc/.asy files, JSON, Spice | PDF, PNG, SVG, JSON, Gerber, Excellon, Pick and Place CSV file, CSV-formatted drill chart, Bill of Materials CSV file, Altium netlist, FreePCB netlist, PADS Layout Netlist, Spice netlist. | JSON |
| Fritzing | 0.9.3b[5] 3 June 2016 |
Yes, + breadboard | No | Yes | Yes | Yes | Linux, Mac | Yes | en, de, nl, es, it, fr, pt, ru, zh, jp, ... | gEDA symbols, KiCad symbols, SVG | Gerber, DIY etching, BOM, SVG, PDF, EPS | |
| gEDA | 1.8.2[6] 25 September 2013 |
Yes | Yes | Yes | Yes | Yes | Linux, Mac | Yes | en | gschem netlists, image as background | Gerber, Excellon, SVG, PDF, EPS, PNG, GIF, JPEG, Specctra, XYRS | yes |
| KiCad | 5.0.0[7]
|
Yes | Internal: Ngspice External: SPICE netlist export |
Yes | Yes | Yes | Linux, Mac | Yes | zh_CN, de, en, es, fr, it, pt, ru, ja, pl, cz | TinyCAD net lists, OrCAD EDIF, EAGLE (XML) | PDF, Gerber, Gerber X2, Excellon, netlist, VRML2, IDFv3 | Python |
| OrCAD | 17.2 1985 |
Yes | Yes | Yes | No | Yes | No | No | en | Eagle, PADS, Altium, STEP, DXF, IDF, IDX,OrCAD SDT, OrCAD Layout,OrCAD | PDF, Gerber, Gerber X2, Excellon drill/route, netlist, ODB++, DXF, IDF, IDX, STEP,3D PDF, IPC2581 | Tcl/TK, SKILL (Lisp) |
| pcb-rnd | 2.0.0[8] 6 June 2018 |
No | No | Yes | Yes | No | Linux, Mac | Yes | en | gschem netlists, Protel Autotrax, Kicad (legacy & s-expr layouts), Eagle (XML & v3,4,5 binary layouts), eeschema netlists, mentor netlists, TinyCad netlists, LT-Spice, MUCS, Specctra, Mentor Graphics Hyperlynx, BMP, JPG, GIF, HPGL, image as background | Gerber/[Excellon format|drill],SVG, PDF, EPS, PNG, GIF, JPEG, Specctra, Protel Autotrax, Kicad (legacy & s-expr), dxf, FidocadJ, Mentor Graphics Hyperlynx, template configurable XYRS/BOM | Multiple languages |
| Upverter | 3.0 29 August 2014 |
Yes | No | Yes | Yes | Yes | Web application | No | en | Altium, OrCad, PDF, OpenJSON, Eagle | PDF, Gerber, Excellon, netlist, PADS Layout Netlist, Tempo Automation, Pick and Place CSV, High-Res PNG, STL, CSV-formatted drill chart, CSV-formatted list of all parts | |
| Micro-Cap by Spectrum Software | 11.0.2.0 3 September 2016 |
Yes | Yes | No | No | Yes | No | No | en, jp | HSPICE, PSPICE, SPICE3, netlists, Images, IBIS, Touchstone | SPICE text file, netlist, BOM, Protel, Accel, OrCad, PADS netlists, Schematic and Analysis Plots Images, Numeric Output Text, Excel | |
| Pulsonix by WestDev Ltd | 10.0 1 October 2018 |
Yes | Yes | Yes | No | Yes | Wine | No | en | Allegro, Altium, CadStar, Eagle, OrCAD, PADS, P-CAD, Protel, Gerber, STEP, DXF, IDF, more | Gerber, Gerber X2, Excellon, ODB++, IPC-2581, PDF, DXF, STEP, IDF, BOM, more | Proprietary language, ActiveX |
| TARGET 3001! | 19.8.0.32 28 September 2018 |
Yes | Yes | Yes | No | Yes | No | No | en, de, fr | Eagle, DXF, Gerber, XGerber, Excellon, BMP, CXF, STEP 3D | XGerber, Excellon, Eagle, HPGL, G-Code (Milling), CXF, STEP 3D, Excel BOMs, Pick&Place, GenCAD, FABmaster, IPC D-356, Test points, Netlists, OBJ, POV-Ray, PDF | |
| NI Ultiboard and Multisim by National Instruments | 14.1 1 March 2017 [9] |
Yes | Yes | Yes | No | Yes | Web application [10] | No | en | MS*, MP*, EWB, Spice, OrCAD, UltiCap, Protel, Gerber, DXF, Ultiboard 4&5, Calay | BOM, Gerber, Excellon, IGES (3D), DXF (2D & 3D), SVG | |
| 123D Circuits by Autodesk | N/A | Yes, + breadboard | Yes | Yes | Yes | Yes | Web application | No | en | Eagle | Gerber | |
| Application and developer | Latest version/release + date | Schematic? | Simulation? | PCB editing? | Runs on POSIX style systems? | Runs on Windows? | Other platforms? | Open source? |
User Interface Language(s) | Imports | Exports | Scripting support |
Note: ODB++ support is drawn partly from lists by Artwork Conversion Software[4] and Mentor Graphics[11]
See also
- Electronic Design Automation (EDA)
- List of EDA companies
- List of free electronics circuit simulators
- Schematic editor
- SPICE, a general purpose analog circuit simulator.
- TopoR
References
- ^ Wirtz, Alfons (2014-03-08) [2004]. "FreeRouting - Printed Circuit Board Routing Software from FreeRouting.net". Archived from the original on 2017-09-24. Retrieved 2017-09-24.
{{cite web}}:|archive-date=/|archive-url=timestamp mismatch; 2017-09-23 suggested (help); Unknown parameter|dead-url=ignored (|url-status=suggested) (help) - ^ Advanced Design System – ADS Software - Current Version
- ^ a b c ADS Supported Platforms
- ^ a b "PCB tools supporting ODB++". Artwork.com. Artwork Conversion Software Inc. Retrieved 2011-09-25.
- ^ http://blog.fritzing.org/2016/06/03/new-fritzing-release-0-9-3b/
- ^ http://wiki.geda-project.org/geda:download
- ^ "KiCad 5 - a new generation". 2018-07-22. Archived from the original on 2018-07-29. Retrieved 2018-07-22.
{{cite web}}: Unknown parameter|dead-url=ignored (|url-status=suggested) (help) - ^ http://repo.hu/projects/pcb-rnd/news.html
- ^ "Latest Multisim Release".
- ^ "Multisim Web App".
- ^ "ODB++ Data Exchange". Mentor.com. Mentor Graphics. Archived from the original on 2012-10-06. Retrieved 25 September 2011.