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List of instruction sets

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This is an old revision of this page, as edited by 77.56.125.101 (talk) at 10:57, 30 June 2014 (Removed Link marker around SH64 as this led to a wiki page on Routes with number 64. Clearly nothing to do with Hitachi processors.). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

A list of computer central processor instruction sets:

AMD

Analog Devices

ARM

Atmel

CDC

DEC

Donald Knuth

Hewlett-Packard

Hitachi

  • SuperH, RISC[12][13][14]
    • SH-1 (56 instructions)
    • SH-2 (62 instructions)
    • SH-2 DSP (154 instructions)
    • SH-3 (68 instructions)
    • SH-3 DSP (160 instructions)
    • SH-4 (91 instructions)[15]
    • SH-5
  • SH64,[16]
  • H8
    • H8/300 (57 instructions) RISC like[17]
    • H8/500 (63 instructions)[18]
    • H8S/2000
    • HD6309[19]

IBM

Intel

  • 4004
  • 8008 / Datapoint 2200
  • 8080 (111 Instructions),[20] 8085 (113 Instructions)[21]
  • 8021 (66 Instructions)[22]
  • 8022 (73 Instructions)[23]
  • MCS-41 (8041) (87 Instructions)[24]
  • MCS-48 (8048) (93 Instructions)[25]
  • MCS-51 (8051)
  • Intel iAPX 432
  • Intel i860[26][27]
  • i960
  • IA-64,[28] Itanium, originated at Hewlett-Packard (HP), and later jointly developed by HP and Intel
  • x86, See: x86 instruction listings
    • IA-32 (i386, Pentium, Athlon)
    • Intel 64 64-bit version of x86, originally developed by AMD as AMD64
    • Extensions[29]
      • FPU (x87) – Floating-point-unit (FPU) instructions
      • MMX – MMX SIMD instructions
      • MMX Extended – extended MMX SIMD instructions
      • SSE – streaming SIMD extensions (SSE) instructions (70 instructions)
      • SSE2 – streaming SIMD extensions 2 instructions (144 new instructions)
      • SSE3 – streaming SIMD extensions 3 instructions (13 new instructions)
      • SSSE3 – supplemental streaming SIMD extensions (16 instructions)
      • SSE4.1 – streaming SIMD extensions 4, Penryn subset (47 instructions)
      • SSE4.2 – streaming SIMD extensions 4, Nehalem subset (7 instructions)
      • SSE4 – All streaming SIMD extensions 4 instructions (both SSE4.1 and SSE4.2)
      • SSE4a – streaming SIMD extensions 4a (AMD)
      • SSE5 – streaming SIMD extensions 5 (170 instructions)
      • XSAVE – XSAVE instructions
      • AVX – advanced vector extensions instructions
      • FMA – fused multiply-add instructions
      • AES – Advanced Encryption Standard instructions
      • CLMUL – Carry-less mtiply (PCLMULQDQ) instruction
      • 3DNow![citation needed] – 3DNow! instructions (21 instructions)
      • 3DNow! Extended – extended 3DNow! instructions (5 instructions)
      • Cyrix – Cyrix-specific instructions
      • AMD – AMD-specific instructions (older than K6)
      • SMM – System management mode instructions
      • SVM – Secure virtual machine instructions
      • PadLock – VIA PadLock instructions

Infineon

Lattice Semiconductor

Motorola

Microchip Technology

MIPS

  • MIPS
    • MIPS I
    • MIPS II
    • MIPS III
    • MIPS IV[43]
    • MIPS V
    • MIPS16
    • MIPS32
    • MIPS64
    • MDMX

Mitsubishi

National Semiconductor

Renesas

Sun Microsystems

Texas Instruments

Xilinx

Zilog

Other

See also

References

  1. ^ Evaluating and Programming the 29K RISC Family, AMD
  2. ^ ARM Software Development Toolkit Reference Manual, Advanced RISC Machines Ltd
  3. ^ ARM Thumb
  4. ^ ARM DSP
  5. ^ ARM Thumb-2
  6. ^ ARM TrustZone
  7. ^ ARM SIMD
  8. ^ ARM - NEON media acceleration technology
  9. ^ AVR
  10. ^ "AVR32 Architecture Document", Atmel.
  11. ^ MMIX
  12. ^ SH-Microcomputer User's Manual (Renesas)
  13. ^ SuperH (SH) 64-Bit RISC Series (SuperH).
  14. ^ http://www.renesas.com/products/mpumcu/superh/child/sh_cpu_child.jsp
  15. ^ SH-4 32-bit CPU Core Architecture
  16. ^ SuperH 64 bit RISC Series Architecture Manual (SuperH, Inc.)
  17. ^ H8/300
  18. ^ H8/500 Series Programming Manual (Hitachi M21T001)
  19. ^ Instruction set reference for 6809/6309 (PDF) By Chris Lomont
  20. ^ 8080a
  21. ^ 8085a
  22. ^ 8021
  23. ^ 8022
  24. ^ 8041
  25. ^ 8048
  26. ^ i860 Microprocessor Programmer's Reference Manual or i860 Microprocessor Architecture
  27. ^ i860 Microprocessor Datasheet
  28. ^ IA-64 Architecture Handbook
  29. ^ Yasm User Manual – Execution Modes and extensions, Chapter 18. x86 Architecture
  30. ^ "Infineon C166 and Instruction Set Manual", Infineon
  31. ^ "Infineon C500 Architecture and Instruction Set", Infineon
  32. ^ [1]
  33. ^ 6800 MICROPROCESSOR Instruction Set Summary (April 1985)
  34. ^ 6801/68701 Single-Chip MICROCOMPUTER Instruction Set Summary (April 1985)
  35. ^ 6805 MICROPROCESSOR Instruction Set Summary (April 1985)
  36. ^ 6809 MICROPROCESSOR Instruction Set Summary (April 1985)
  37. ^ http://www.textfiles.com/programming/CARDS/68000
  38. ^ http://www.textfiles.com/programming/CARDS/68010
  39. ^ DSP56800 Family Manual
  40. ^ Section 29. Instruction Set
  41. ^ a b c Instruction set: PIC
  42. ^ dsPIC30F Programmer’s Reference Manual
  43. ^ MIPS IV Instruction set
  44. ^ D10V Architecture: A VLIW Microprocessor for Multimedia Applications (Mitsubishi Electric Corp.)
  45. ^ D30V Architecture: A VLIW Microprocessor for Multimedia Applications (Mitsubishi Electric Corp.
  46. ^ NSC800 MICROPROCESSOR Instruction Set Summary (April 1985)
  47. ^ NS16032 MICROPROCESSOR Instruction Set Summary (July 1985)
  48. ^ NS32016 MICROPROCESSOR Instruction Set Summary (July 1985)
  49. ^ NS32032 MICROPROCESSOR Instruction Set Summary (July 1985)
  50. ^ "78K0R Microcontrollers User's Manual: Instructions" (PDF). Renesas. January 2011. pp. 191–192. Retrieved 2011-08-02. {{cite web}}: Cite has empty unknown parameter: |coauthors= (help)
  51. ^ "RL78 family User's Manual: Software" (PDF). Renesas. January 2011. pp. 198–199. Retrieved 2011-08-02. {{cite web}}: Cite has empty unknown parameter: |coauthors= (help)
  52. ^ Renesas M16C
  53. ^ Renesas M32C
  54. ^ Renesas M32R
  55. ^ NEC V850 Family 32-/16-Bit single-Chip Microcontroller Architecture Manual from NEC. Ltd
  56. ^ The Sparc Architecture Manual
  57. ^ 9900 MICROPROCESSOR Instruction Set Summary
  58. ^ 9940 MICROPROCESSOR Instruction Set Summary
  59. ^ 9980 MICROPROCESSOR Instruction Set Summary
  60. ^ MSP430 User's Manual, document slau049d, Texas Instrument, Inc
  61. ^ "Xilinx UG129 PicoBlaze 8-bit Embedded Microcontroller User Guide, Chapter 3, PicoBlaze Instruction Set", Xilinx
  62. ^ Z80 MICROPROCESSOR Instruction Set Summary (April 1985)
  63. ^ Z8601/02/03/11/12/13 Single-Chip MICROCOMPUTER Instruction Set Summary (April 1985)
  64. ^ Z8001/Z8002 MICROPROCESSOR Instruction Set Summary
  65. ^ ARC Programmers Reference Manual, ARC International
  66. ^ Sailer, Philip M.; Kaeli, David R.. The DLX Instruction Set Architecture Handbook. Morgan Kaufmann. ISBN 1-55860-371-9.
  67. ^ "The Clipper processor: instruction set architecture and implementation"
  68. ^ SPO256 - Speech processor
  69. ^ INMOS Transputer
  70. ^ 6502 MICROPROCESSOR Instruction Set Summary
  71. ^ Raptor-16
  72. ^ CDP1802 COSMAC Microprocessor Instruction Set Summary (April 1985)
  73. ^ 2650 MICROPROCESSOR Instruction Set Summary
  74. ^ "XMOS XS1 Instruction Set Architecture"
  75. ^ Xtensa Instruction Set Architecture (ISA) Reference Manual

Further reading

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