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Ingenic Semiconductor

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Ingenic Semiconductor Co., Ltd.
Native name
君正集成电路股份有限公司
Ingenic Semiconductor
IndustryFabless semiconductors, Semiconductors, Integrated circuit design
Founded2005; 19 years ago (2005)
FounderLiu Qiang (刘强)
HeadquartersBeijing, China
Key people
Liu Qiang (Chairman)
ProductsCPUs (XBurst), SoCs (JZxxx)
Websitewww.ingenic.com.cn/en

Ingenic Semiconductor is a Chinese fabless semiconductor company based in Beijing, China founded in 2005. They purchased licenses for the MIPS architecture instruction sets in 2009 and design CPU-microarchitectures based on them. They also design system on a chip products including their CPUs and licensed semiconductor intellectual property blocks from third parties, such as Vivante Corporation, commission the fabrication of integrated circuits at semiconductor fabrication plants and sell them.

XBurst microarchitecture

The XBurst CPU microarchitecture is based upon the MIPS32 revision 1 respectively the MIPS32 revision 2 instruction set and implements an 8-stage pipeline. XBurst CPU technology consists of 2 parts:

  • A RISC/SIMD/DSP hybrid instruction set architecture which enables the processor to have the capability of computation, signal processing and video processing. This includes the Media Extension Unit (MXU), a 32-bit SIMD extension. All JZ47xx series CPUs with Xburst uA support MXU, except for the JZ4730.[1][2] MXU has its own register set, distinct from the general purpose MIPS registers. It consists of sixteen 32-bit data registers and a 32-bit control register.[3] CPUs which support MXU are used in MIPS Creator single-board computers. They are also present in various tablets, handheld game devices, and embedded devices.

XBurst2 microarchitecture

Ingenic Semiconductor purchased a MIPS64 instruction set license and designed a microarchitecture based on it: XBurst2. XBurst2 is a dual-issue/dual-threaded CPU design. Its development "will basically be completed" in the first half of 2014 as announced at Summer 2013.[4]

XBurst1-based SoCs

Ingenic JZ4730

SoCs incorporating the XBurst microarchitecture:[5]

Model Launch Fab (nm) XBurst1 FPU GPU VPU Datasheet Package Notes
version Core clock (MHz) L1 Dcache
[kB] 		L1 Icache
[kB] 		L2 cache
[kB]
Jz4720 2005 180 MIPS32 rev1 240 16 16 N/A N/A N/A N/A Jz4720[permanent dead link]
Jz4725B 2005 160 360 Jz4725
Jz4730 2005 180 336 Jz4730[permanent dead link]
Jz4740 2007 180 MIPS32 rev1 + SIMD 360 Jz4740[permanent dead link] adds RMVB, MPEG-1/2/4 decoding capability up to D-1 resolution thanks to SIMD instruction set
Jz4750 2009 180 MIPS32 rev1 + SIMD2 360 480p Jz4750 adds TV encoder
Jz4755 2009 160 400 576P Jz4755 QFP176 second core is for video processing only
Jz4760 2010 130 600 yes Vivante GC200 720p JZ4760
JZ4760B		 BGA345 second core is for video processing only, IEEE754-complient FPU
Jz4770 2011 65 MIPS32 rev2 + SIMD2 1000 256 yes Vivante GC860[6] 1080p JZ4770 BGA379 1080p video decoding unit for h.264, VC-1 and VP8 (a secondary 500 MHz MIPS processor with SIMD extension)
Jz4775[7] 65 MIPS32 rev2 + SIMD2 1000 32 32 256 yes X2D Core 720p JZ4775 BGA314 720p video decoding unit for h.264, VC-1 and VP8 (a secondary 500 MHz MIPS processor with SIMD extension)
Jz4780 2012 40 Dual MIPS32 rev2 + SIMD2 1200[8] 32 each 32 each 512 yes PowerVR SGX 540 1080p JZ4780 BGA390 Dual core (SMP) XBurst CPU, 1080p video decoding unit for h.264, VC-1 and VP8 (a secondary 500 MHz MIPS processor with SIMD extension)
x1000[9] 2015[10] 65 MIPS32 + SIMD 1000 16 16 128 yes x1000 BGA190 LPDDR 32/64MB, SLCD interface, Camera interface, Audio Codec up to 192 kbps
x2000 2020[11] 28 Dual MIPS32 + SIMD 1500 32 each 32 each 512 yes 1080p x2000 BGA270 LPDDR2/3 128/256MB

Adoption

XBurst1-based SoCs are commonly used in tablet computers, portable media players, digital photo frames and GPS devices:

The JZ4730 CPU is used in the Skytone Alpha-400 and its variants.[12] The Jz4720 is utilized in the Copyleft Hardware project Ben NanoNote.[13] Another popular device, the Dingoo gaming handheld, uses the JZ4732, a de facto JZ4740. Game Gadget is using the JZ4750. Velocity Micro T103 Cruz and T301 Cruz 7-Inch Android 2.0 Tablets used JZ4760. The JZ4770 SoC is used in several of the Ainol Novo 7 Android tablets[14] and 3Q Tablet PC Qoo! IC0707A/4A40. JZ4770 SoC is also used in the dedicated handheld NEOGEO-X[15] and open source handheld GCW Zero[16] running on OpenDingux.[17] The JZ4780 is used in ImgTec's MIPS based single-board computer (SBC); The Creator CI20 [18]

See also

References

  1. ^ "JZ4780 Mobile Application Processor - Programming Manual" (PDF). Imagination Technologies. Archived from the original (PDF) on 4 March 2016. Retrieved 29 December 2015.
  2. ^ "Development:MXU". Dingoonity Wiki. Retrieved 29 December 2015.
  3. ^ "Ingenic SIMD/DSP Instruction Set" (PDF). Ingenic Semiconductor Co. Ltd. Retrieved 30 December 2015.[permanent dead link]
  4. ^ XBurst2 SoC being developed
  5. ^ "Ingenic Xburst Products". Archived from the original on 2011-09-04.
  6. ^ "Archived copy". Archived from the original on 2012-06-03. Retrieved 2011-12-13.{{cite web}}: CS1 maint: archived copy as title (link)
  7. ^ Suspected to be called as JZ4774 sometime
  8. ^ JZ4780 Mobile Application Processor Data Sheet
  9. ^ "Ingenic Semiconductor_M200 M150 JZ4780 JZ4775 JZ4760B". www.ingenic.com.cn. Retrieved 2020-06-02.
  10. ^ Williams, Alun (2015-10-07). "1GHz MIPS chip aimed at human-machine interfacing". Electronics Weekly. Retrieved 2020-06-02.
  11. ^ "1GHz MIPS chip aimed at human-machine interfacing". 2020-07-12. Retrieved 2020-07-13.
  12. ^ Hachman, Mark (May 30, 2008). "Mystery Chip Powers New $299 UMPC - News and Analysis by PC Magazine". 080707 pcmag.com
  13. ^ Ben NanoNote Hardware Components
  14. ^ "$79 Ainol Novo 7 Paladin Tablet Does Ice Cream Sandwich". Archived from the original on 2012-01-17. Retrieved 2012-01-23.
  15. ^ "Neo-Geo X official site". Archived from the original on 2012-08-17. Retrieved 2013-01-10.
  16. ^ "GCW-Zero official site".
  17. ^ http://www.mips.com/news-events/newsroom/newsindex/index.dot?id=71045 Lowest-Cost Android 4.1 Tablet in 2012 is based in MIPS
  18. ^ "Tom's Hardware CI20".

External links

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