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Loongson Technology Corporation Limited
TypeMixed ownership enterprise
IndustrySemiconductor technology industry
FoundedApril 2010
FounderHu Wei Wu
HeadquartersPeople's Republic of China
Loongson Industrial Park, Building 2, Zhongguancun Environmental protection park, Haidian District, Beijing, China
Area served
Key people
  • Chairman
  • Dr.Hu Wei Wu
ServicesChip design, motherboard design, operating system and kernel maintenance, important software and library maintenance
Number of employees
More than 400 (estimate)
WebsiteLoongson Official website
Loongson logo.svg
General information
Marketed byLoongson Technology, Jiangsu Lemote Tech Co., Ltd, Dawning Information Industry, and others
Designed byInstitute of Computing Technology (ICT), Chinese Academy of Sciences, Loongson Technology, Jiangsu Lemote Tech Co., Ltd
Common manufacturer(s)
Max. CPU clock rate800 MHz to 2.0 GHz
HyperTransport speeds800 MHz to 3.0 GHz
Architecture and classification
ApplicationDesktop, Server, Supercomputer, Industrial Device, Embedded Device, Aerospace
Technology node180 nm to 28 nm
Microarchitecturesee text
Instruction setMIPS64 (with LoongISA extensions)
Physical specifications
  • 1–8

Loongson (simplified Chinese: 龙芯; traditional Chinese: 龍芯; pinyin: Lóngxīn; lit. 'Dragon Chip')[1] is the name of a family of general-purpose, MIPS architecture-compatible microprocessors, as well as the name of the Chinese fabless company (Loongson Technology) that develops them. The processors are alternately called Godson processors,[2] which are described as its academic name.[3]


The Godson processors, based on MIPS architecture, were initially developed at the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS).[4] The chief architect was Professor Hu Weiwu [zh].[citation needed] The development of the first Loongson chip was started in 2001.[5][6] The aim of the Godson project was to develop "high performance general-purpose microprocessors in China",[2] and to become technologically self-sufficient as part of the Made in China 2025 plan.[5] The development was supported by funding via the 10th and 11th Five-Year Plans.[7][8]

In 2010 the company was commercialised as a separate entity,[5] and in April 2010 Loongson Technology Corporation Limited was formally established and settled in Zhongguancun, Beijing, China.[citation needed] The company is a public–private partnership between ICT and Beijing-based chip designer BLX IC Design Corporation.[6] BLX itself was a spin-off from ICT, and was founded in 2002 with Jiangsu Zhongyi Group. As Loongson is a fabless designer, STMicroelectronics fabricates and markets the processors.[6][5]

The South China Morning Post reported that since 2020, Loongson has partnered with UnionTech and Sunway to develop and promote the Debian Linux-based Deepin operating system to reduce Chinese computers dependency on Microsoft Windows.[9][10]

In 2021 Loongson filed for an initial public offering on the Shanghai Stock Exchange STAR Market.[5][11] The company was seeking to raise $500 million USD.[11] Details from this time suggested Loongson needing RMB 400,000,000 annual funding, for the first 10 years of its existence, and the company only broke even in 2015.[12]

Instruction set architectures[edit]


Loongson began by using the MIPS64 instruction set architecture (ISA). The internal microarchitecture was independently developed by ICT.[citation needed] Early implementations of the family lacked four instructions patented by MIPS Technologies (US4814976A, unaligned load-store) to avoid legal issues.[13][14]

In 2007, a deal was reached by MIPS Technologies and ICT. STMicroelectronics bought a MIPS license for Loongson, and thus the processor can be promoted as MIPS-based or MIPS-compatible instead of MIPS-like.[15][16][17]

In June 2009, ICT licensed the MIPS32 and MIPS64 architectures directly from MIPS Technologies.[18]

In August 2011, Loongson Technology Corp. Ltd. licensed the MIPS32 and MIPS64 architectures from MIPS Technologies, Inc. for continued development of MIPS-based Loongson CPU cores.[19][20]


The Loongson 3A2000 in 2015 saw the adoption of LoongISA 1.0, an expanded instruction set that is a superset of MIPS64 release 2.[21][8] It can be broken down into:[22]

  • LoongEXT, general-purpose extensions, 148 instructions
  • LoongVZ, virtualisation extensions to the "VZ" system introduced in MIPS64 release 5, 5 instructions
  • LoongBT, faster x86 and ARM binary translation, 213 instructions
  • LoongSIMD, formerly LoongMMI (in Loongson 2E/F), for 128-bit SIMD, 1014 instructions
  • MIPS SIMD Architecture (MSA), DSP, and VZ modules from MIPS Release 5

The LoongISA instructions were introduced as part of the GS464E cores.[8] The binary translation instructions have the specific benefit of speeding up Intel x86 CPU emulation at a cost of 5% of the total die area. The new instructions help a QEMU hypervisor translate instructions from x86 to MIPS with only a reported 30% performance penalty.[23][24]

LoongISA 2.0 was introduced for the GS464V R2 core, with the release of the Loongson 3 4000 series. Compared to LoongISA 1.0, the DSP module is removed, and a few sets are added:[citation needed]

  • LoongSX
  • LoongASX
  • LoongEXT3 (updated)
  • LoongAMU

Loongson SIMD instructions are semi-classified and are unavailable in publicly available compilers and assemblers, Loongson 2F's LoongMMI being the sole exception. A similar status applies to other LoongISA extensions.


Loongson moved to their own processor instruction set architecture (ISA) in 2021 with the release of the Loongson 3 5000 series.[25][26][27] A Loongson developer described it as "...a new RISC ISA, which is a bit like MIPS or RISC-V. LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit version (LA32S) and a 64-bit version (LA64)".[28] The stated rationale was to make Loongson and China not dependent on foreign technology or authorisation to develop their processor capability, whilst not infringing on any technology patents.[29]

The ISA has been referred to as "a fork of MIPS64r6" due to a perceived lack of changes judging from instruction listings.[30][31] In August 2021, Linux maintainers complained that submitted LoongArch code is "...a blind copy of the MIPS code...", however "only with a different name".[32]

The LoongArch ISA manual has been made partially available in August 2021 with the publication of its first volume documenting the basic architecture.[33] According to the LoongArch manual, the ISA uses MIPS's privilege model and IRQ mechanism, with other parts mostly following RISC-V's practice: the delay slot is removed and the instruction encoding is changed.[33] Similar to LoongISA, the instruction-set extensions (SIMD and binary translation) are not yet documented, making this functionality unusable.[33]

The Register reported in November 2021 that the suspicion that LoongArch combines the best parts of MIPS and RISC-V, along with custom instructions.[34] Commentary from Tom's Hardware re-states the issue that the Linux kernel code for LoongArch is the "same code it used for its MIPS-based chips"; they further note that Loongson "fails to demonstrate advantages of its architecture even on paper to software developers".[35]

The LoongArch microarchitecture is poorly documented, with the community speculating around a lot of the functions.[36] The community noted the similarities of LoongArch to MIPS and RISC-V, and that previous Linux kernel submissions were identical to MIPS code.[36]

In February 2022 the developers had submitted patches to allow compilation to LoongArch within LLVM 15.0.[37]


Loongson has three main families of processor cores, some of which are available as IP cores:[38]

  • GS1xx: basic embedded MIPS32 cores with hardware divider. 3- (GS132) or 5- (GS132E) stage pipeline.
  • GS2xx: high-end embedded MIPS32 (GS232/GS232E) or MIPS64 (GS264) cores.
    • GS232 has a 5-stage pipeline at max. 500 MHz. L1 = 16KB.[citation needed] The GS 232 is mainly used for Godson-1 products.
    • GS232E/GS264 has a 10-stage pipeline at max. 1000 MHz. L1 = 16 KB, L2 = 4 MB shared. Out-of-order issue.
  • GS464 series: MIPS64 core with four-way superscalar out-of-order issue.[39] The design originated from the Loongson 2F processor.[8] It was first widely used in the Loongson 3A processor, before also being used in the Loongson 2 series.[39][40]
    • GS464 has support for MIPS64 R2 + LoongMMI (two different versions in 2E and 2F)[citation needed]
    • GS464V was first introduced in 2010 with the Godson 3B, and is a GS464 with vector capabilities.[7][41]
    • GS464E is an improved version of the GS464.[42] Development had started in 2012 after shortcomings were found in the GS464 processor.[8] The core has multiple improvements, including larger caches and better branch prediction amongst others, and was better optimised.[8] The core was extended to support LoongISA (in addition to the in addition to MIPS64 R2 architecture).[42]
    • GS464EV is a development of the GS464 series, first used by the 3A4000 processor[43]
    • LA464 is the development of the GS464 to support LoongArch. Whilst the initial core of the 3A5000 was noted to be GS464, due to incompatible instruction sets Loongson renamed the 3A5000 core to LA464 in their documentation in August 2021.[36]

All Loongson cores are little-endian.[citation needed]

It has been noted by the community that the naming of the Loongson microarchitectures is not consistent, with different products being noted to have the same processor core, even though the instructions sets might not be exactly compatible.[36]

Processor families[edit]

Loongson has built 3 processor families from their architectural cores.[24] These are the:[24]

  • Godson-1, for consumer electronics and embedded applications
  • Godson-2, single core processors for embedded applications and low performance personal computers[note 1]
  • Godson-3, multi-core processors for higher performance computers, high-performance computing and servers[note 2]


The first Loongson processor, the Godson-1, was designed in 2001, released in 2002, and is a 32-bit CPU running at a clock speed of 266 MHz.[6][3][24] It is fabricated with 0.18 micron CMOS process, has 8 KB of data cache, 8 KB of instruction cache and a 64-bit floating-point unit, capable of 200 double-precision MFLOPS.[44] Godson-1 series chips either use the GS132 or GS232 cores.[45]

Loongson X is a radiation hardened version of the GS232 core used in the Godson-1.[8]

Godson-2 / Loongson 2[edit]

The Loongson 2 is a family of MIPS III compatible processors.[46][3] It adds 64-bit ability to the Loongson architecture.[6][24] Later Loongson 2 processors migrated to being MIPS64 compatible, due to sharing the GS464 core with the Loongson 3 series.[8] Whilst early 2 series processors were single core, they developed to become multicore.

The development plan for the Godson-2 was to develop it from a CPU to a SOC.[3][7] The 2E (2006) was a CPU, the 2F (2007) integrated the north bridge, the 2G (2008) had a hyper transport link between the CPU/north bridge and an integrated GPU/south bridge, and the 2H (2009) integrated all these functions into a SOC.[3][7] The design of the 2F was the basis of the GS464 core.[8] The 2G uses a single GS464 core;[7] the 2H uses the GS464V core, as a single-core version of the initial Godson 3B.[41]

Godson-3 / Loongson 3[edit]

Loongson 3B1500E CPU
Lemote-A1310 mini-ITX motherboard (with Loongson 3B1500E)
Loongson 3A3000 CPU

The Loongson 3 family of processors are "...multi-core CPU[s] designed for high performance desktops, servers and clusters".[47][24] They were designed as the first Loongson processors that had multiple cores.[39] The processors were designed to use LoongISA - i.e. the MIPS64 ISA with additional extensions.[39] The designers also attempted to optimise x86 translation on the chip.[3]

Initial versions[edit]

The first production processor was the Loongson 3A, which used 4 GS464 cores.[39][23] The 65 nm Loongson 3A1000 is able to run at a clock speed near 1 GHz, with 4 CPU cores (~15 W) first and 8 cores later (40 W).[citation needed] In April 2010, Loongson 3A1000 was released with DDR2/3 DRAM support.[citation needed]

The designers noted that they would produce a 3B chip with enhanced processing and vector capabilities, with 8 cores, and a 3C for server applications with up to 16 cores.[7][24] The 8-core Loongson 3B was noted to use the upgraded GS464V core, with extended vector capabilities.[41] This was followed by the Loonson 3C which used 16 GS464V cores.[41]

The 3B1000, and related 2I, both failed as processors due to design errors.[21] In May 2013 development of the 3C was suspended, in favour of developing the 3A2000 processor.[21]

Later versions[edit]

In 2015, the 3A1500 and 3B2000 were released using the enhanced GS464E cores.[8] The improved microarchitecture core allowed better performance, reportedly 3 times as fast as the 3A1000, as well as introducing the LoongISA enhanced instruction set.[8] The 3A1500 was for embedded applications, whilst the 3B2000 was for servers and PCs.[8]

In 2017 Loongson released the 3A3000. The 3A3000 is designed with quad-core 64-bit and clocked at 1.5 GHz, power consumption is only 30 W.[citation needed] The performance of the 3A3000 is reported to be equivalent to the Intel J1900 processor (released in 2013).[43]

In late-2019 the 3A and 3B 4000 series were released. They used the upgraded GS464EV microarchitecture.[43] The processors are designed with four cores, 8MB of L3 cache and operating clocks between 1.8 GHz to 2 GHz.[citation needed]

Loongson 3 LoongArch processors[edit]

In July 2021 the Loongson 3 5000 series was released.[27] The processor series is Loongson's first with their own developed ISA, "LoongArch".[27] The processors announced include the 3A5000, a four-core desktop CPU, and the 3C5000L, a sixteen-core server CPU based on four 3A5000 in a single package.[30][26][34] Both CPUs are reported to be fabricated on a 12 nm process. Whilst the processor was noted to be using the GS464V cores initially, due to incompatibility with previous versions, the cores were renamed to LA464 in August 2021.[36]

The Register reported that "the 3A5000 is said to be 50 per cent faster and 30 per cent more power efficient" than the preceding 3A4000.[34] Phoronix reports that the 3A5000 CPU is "roughly on a par with the likes of the Intel Core i3 8109U / Core 2 Quad Q9500 / Core i5 750, or Armv8-based Phytium FT-2000".[27][25]

In 2022 Loongson announced their 6000 series processors.[48] The updated processor architecture will use "LA664" cores.[48], and the company noted that the single-core performance will rival that of AMD's Zen 3 and Intel's Tiger Lake architecture.[48]

Supported software[edit]

Operating systems[edit]

The Loongson processors are mainly designed around using the Linux operating system.[49] Any operating system supporting the MIPS architecture should theoretically work. Windows CE was ported to a Loongson-based system with minimal effort.[50] In 2010, Lemote ported an Android distribution to the Loongson platform.[51]

Loongson machines are used in the package-building and CI infrastructure of Debian and Golang, respectively. This is partially because of Loongson's status as the only vendor producing application-grade MIPS CPUs for retail.[52][53]

As of February 2022, there are 3 Chinese Linux distributions that support LoongArch: these are Kylin, Loongnix and Unity Operating System. There are efforts to build LoongArch support into community versions of Linux.[36]

Compiler support[edit]

The GNU Compiler Collection (GCC) is the main compiler for software development on the Loongson platform.[54][55]

Before 2021 LLVM support was still inadequate due to missing workarounds for Loongson's CPU errata on MIPS.[56][36] From February 2022 LoongArch support was added to LLVM 15.0.[36]

ICT also ported Open64 to the Loongson II platform.[57]

Loongson microprocessor specifications[edit]

Series Model Frequency
MicroArchitecture Year Cores Process
Die Size
Cache (KiB) Peak Floating Point Performance
int/fp [SPEC2000] (SPEC2006)
L1(Single Core) L2 L3
Data instruction
Godson 1 266 MIPS-II 32-bit 2001 1 180 22 71.4 1.0 Un­known 8 8 0.6 [19/25] [58]
FCR_SOC 266 MIPS-II 32-bit 2007 1 180 Un­known Un­known Un­known Un­known 8 8 0.6 Un­known [59][60]
2B 250 MIPS-III 64-bit 2003 1 180 Un­known Un­known Un­known Un­known 32 32 Un­known [52/58]
2C 450 MIPS-III 64-bit 2004 1 180 13.5 41.5 Un­known Un­known 64 64 Un­known [159/114]
2E 1000 MIPS-III 64-bit GS464 (r1)(Prototype) 2006 1 90 47 36 7 1.2 64 64 512 Un­known [503/503]
Loongson 1 1A 300 MIPS32 GS232 2010 1 130 22 71.4 1.0 Un­known 16 16 0.6 Un­known [61]
1B 266 MIPS32 GS232 2010 1 130 13.3 28 0.6 Un­known 8 8 Un­known Un­known [62]
1C 300 MIPS32 GS232 2013 1 130 11.1 28.3 0.5 Un­known 16 16 Un­known Un­known [63]
1C101 8 MIPS32 GS132R 2018 1 130 Un­known Un­known Un­known Un­known Un­known Un­known [64]
1D 8 MIPS32 GS132 2014 1 130 1 6 3 × 10−5 Un­known Un­known Un­known [65]
Loongson 2 2F 1200 MIPS-III 64-bit GS464 (r1) 2007 1 90 51 43 5 1.2 64 64 512 3.2 Un­known [66]
2G 1000 MIPS64 GS464 (r2) 2012 1 65 Un­known Un­known Un­known 1.15 64 64 4096 Un­known Un­known [67]
2GP 800 MIPS64 GS464 (r2) 2013 1 65 82 65.7 8 1.15 64 64 1024 3.2 Un­known
2H 1000 MIPS64 GS464 (r2) 2012 1 65 152 117 5 1.15 64 64 512 4 Un­known
2K1000 1000 MIPS64 Release 2 LoongISA 1.0 GS264E 2017 2 40 1900 79 5 1.1 32 32 256 × 2 1024 8 Un­known [68]
Loongson3 3A1000 1000 MIPS64 Release 2

LoongISA 1.0

GS464 (r2) 2009 4 65 425 174.5 10 1.15 64 64 256 × 4 16 [568/788], (2.4/2.3) [69]
3B1000 1000 MIPS64 Release2

LoongISA 1.0

GS464 (r2) 2010 4+4 65 > 600 Un­known 20 1.15 64 64 128 × 8 Un­known Un­known [70]
3B1500 1200–1500 MIPS64 Release 2

LoongISA 1.0

GS464V 2012 4+4 32 1140 142.5 30(typical)
1.15–1.35 64 64 128 × 8 8192 150 Un­known [71][72]
3A1500-I 800–1000 MIPS64 Release2

LoongISA 1.0

GS464E 2015 4 40 621 202.3 15 1.15–1.25 64 64 256 × 4 4096 16 (6/??) [73]
3A3000 1500 MIPS64 Release 2

LoongISA 1.0

GS464E 2016 4 28 > 1200 155.78 30 1.15–1.25 64 64 256 × 4 8192 24 [1100/1700], (11/10)@Single (36/33)@Rate [74][75]
3B3000 GS464E
3A4000 1800-2000 MIPS64 Release 5

LoongISA 2.0

GS464EV(GS464v) 2019 4 28 ? ? <30 W@1.5 GHz

<40 W@1.8 GHz

<50 W@2.0 GHz[76]

0.95-1.25 64 64 256 x 4 8192 128 (21.1/21.2)@Single (61.7/58.1)@Rate
3A5000 3B5000 2300-2500 LoongArch GS464V 2021 4 12 / 14 ?? ?? 35w @ 2.5 GHz ?? 64 64 256x4 16384 160 (26.6*/??)@Single, (80*/??)@Rate *SpecInt Base point [77][34]
3C5000L 2200 LoongArch GS464V 2021 16 12 / 14 ?? ?? 150w @ 2.2 GHz ?? 64 64 256x16 16384x4 560 Unknown [77]
3C5000L-LL 2000 LoongArch GS464V 2021 16 12 / 14 ?? ?? 125w @ 2.0 GHz ?? 64 64 256x16 16384x4 512 Unknown

Loongson-based systems[edit]

Lemote FuLoong and YeeLoong with a Loongson 2F microprocessor
Lemote's Fulong MiniPC on top of a CD-ROM drive as reference

In 2012 it was reported that Loongson processors had found itself into very few computing systems.[6] The processors are mainly used in Chinese computers; in 2021 it was reported that Loongson supplies CPUs for most desktop computers procured by the Chinese government, and 80% of the Chinese government's servers.[12] The release of the 3A3000 processor in 2015 was noted as turning point for the company's fortunes.[12] In 2017 it was noted that the company's processors were being used in the Beidou satellite.[12][8]

Personal computers[edit]

In March 2006, a 100 Loongson II computer design called Longmeng (Dragon Dream) was announced by Lemote.[citation needed]

In June 2006 at Computex'2006, YellowSheepRiver announced the Municator YSR-639,[78] a small form factor computer based on the 400 MHz Loongson 2.

As of November 2008 the new 8.9" netbook from the Chinese manufacturer Lemote that replaced mengloong, Yeeloong (Portable Dragon),[79] running Debian, is available[80] in Europe from the Dutch company Tekmote Electronics.

In January 2010, Jiangsu province planned to buy 1.5 million Loongson PCs.[81]

In September 2011, Lemote announced the Yeeloong-8133 13.3" laptop featuring 900 MHz, quad-core Loongson-3A/2GQ CPU.[82]


On 26 December 2007, China revealed its first Loongson based supercomputer in Hefei. The KD-50-I has a reported peak performance of 1 TFLOPS, and about 350 GFLOPS measured by LINPACK.[83] This supercomputer was designed by a joint team led by Chen Guoliang at the computer science technology department of the University of Science and Technology of China (USCT) and ICT (the secondary contractor). KD-50-I is the first Chinese built supercomputer to utilize domestic Chinese CPUs, with a total of more than 336 Loongson-2F CPUs, and nodes interconnected by ethernet. The size of the computer was roughly equivalent to a household refrigerator and the cost was less than RMB800,000 (approximately US$120,000, 80,000).[84]

On 20 April 2010, USTC announced the successful development of the Loongson 3A based KD-60-1. The supercomputer is a cluster of standard blade servers with a total of over 80 quad-core Loongson processors, providing theoretical peak performance of 1 TFLOPS and reduces power consumption by 56% compared to the KD-50-I system, with similar performance.[85]

On 26 December 2012, USTC announced the Loongson 3B based KD-90-1. Based around blade servers, like the KD-60-1, the supercomputer has over 10 octo-core Loongson processors, providing theoretical peak performance of 1 TFLOPS, and reduces power consumption by 62% compared to the KD-60 system that has similar performance.[86]

In 2012 it was reported that Loongson processors were to be found in the Sunway BlueLight MPP and Dawning 6000 supercomputers.[6]

See also[edit]


  1. ^ The Godson/Loongson 2 series processors have been developed and named mostly sequentially in an alphabetical format.
  2. ^ The Godson/Loongson 3 series processors seem to be named according to segment and then a generation number. The segment tends to be A (general purpose PCs), B (seemingly high core counts) and C (server processors). The generation numbers start at 1000 for the first series processors, and then increment generally to the next thousand. There are some processors that may be between generation products, that have a x5000 designation.


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