BiiN was a company created out of a joint research project by Intel and Siemens to develop fault tolerant high-performance multi-processor computers build on custom microprocessor designs. BiiN was an outgrowth of the Intel iAPX 432 multiprocessor project, ancestor of iPSC and nCUBE.
The company was closed down in October 1989, and folded in April 1990, with no significant sales. The whole project was considered within Intel to have been so poorly managed that the company name was considered to be an acronym for Billions Invested In Nothing. However, several subset versions of the processor designed for the project were later offered commercially as versions of the Intel i960, which became popular as an embedded processor in the mid-1990s.
BiiN began in 1982 as Gemini, a research project equally funded by Intel and Siemens. The project's aim was to design and build a complete system for so-called "mission critical" computing, such as on-line transaction processing, industrial control applications (such as managing nuclear reactors), military applications intolerant of computer down-time, and national television services. The central themes of the R&D effort were to be transparent multiprocessing and file distribution, dynamically switchable fault tolerance, and a high level of security. Siemens provided the funding through its energy division UBE (Unternehmensbereich Energietechnik), who had an interest in fault tolerant computers for use in nuclear installations, while Intel provided the technology, and the whole project was organised with alternate layers of Siemens and Intel management and engineers. Siemens staff stemmed from its various divisions, not just UBE (where the project unit was called E85G). The core development labs were located on an Intel site in Portland, OR, but there were also Siemens labs in Berlin, Germany, (Sietec Systemtechnik, Maxim Ehrlich's team creating the Gemini DBMS), Vienna, Austria, Princeton, New Jersey (United States) and also Nuremberg, Germany, involved in the development.
Since neither Siemens nor Intel could see how to market this new architecture if it were broken up, in 1985 the project became BiiN Partners, and in July 1988 was launched as a company wholly owned by Intel and Siemens. A second company wholly owned by Intel, called BiiN Federal Systems, was also created in order to avoid Foreign Ownership and Controlling Interest (FOCI) problems in selling to the US government. Intel owned all the silicon designs which were licensed to Siemens, while Siemens owned all the software and documentation and licensed them to Intel.
BiiN aimed their designs at the high-end fault tolerant market, competing with Tandem Computers and Stratus Computer, as opposed to the parallel processing market, where Sequent Computer Systems, Pyramid Technology, Alliant Computer Systems and others were operating. In order to compete here they had to make sure their first designs were as powerful as the best from the other vendors, and by the time such a system was ready both Intel and Siemens had spent about 300 million with no shipping units.
In 1989 Siemens underwent a reorganization, which brought UBE's own computer division into the mix. They had long been working with Sequent Computer Systems, and were sceptical that the BiiN systems would deliver anything that the Sequent systems could not. Eventually Intel and Siemens could not agree on further funding, and the venture ended. Several pre-orders on the books were cancelled, and the technology essentially disappeared.
With the closing of the project, Intel used the basic RISC core of the CPU design as the basis for the i960 CPU. For this role most of the "advanced" features were removed, including the complex tagged memory system, task control system, most of the microcode and even the FPU. The result was a "naked" core, useful for embedded processor use. Before Intel switched to the StrongARM for the embedded role in the late 1990s, the i960 was one of Intel's most popular products.
Key to the BiiN system was the 960 MX processor, essentially a RISC-based version of the earlier i432. Like the i432, the 960 MX included tagged memory for complete memory protection even within programs (as opposed to most CPU's, which offer protection only between programs), a full set of instructions for task control, and complex microcode to run it all.
Unlike the i432, the 960 MX had fairly good performance, mostly as a side effect of dramatically reducing the complexity of the core instruction set, integration of all CPU functions on a single chip, and including an FPU. The CPUs were hosted on cards that included an I/O support CPU and either 8 to 16MB of RAM.
Two systems were designed, the BiiN 20 was an entry-level machine with one or two processors, and an interesting battery-backed disk-cache. The larger BiiN 60 was similar, but supported up to eight CPUs. Both machines could be used in larger multi-machine systems.
One interesting feature of the BiiN was that the CPU sets could be used to provide either fault tolerance, as in the Tandem systems, or parallel processing, as in the Pyramid and Sequent systems. This allowed users to tailor their systems to their needs, even on the fly. The BiiN systems also provided two versions of fault tolerance. In fault-checking mode, processors were paired so that they could check one another's calculations. In event of an error, the processors would stop, and the circuitry would determine which was faulty. This processor would then be excluded from the system, and the computer would restart. In continuous operation mode the fault-checking pairs were duplicated, so that if an error occurred the second pair could immediately take over the calculations.
Also of historical note was that the operating system (OSIRIS), applications, development tools, and every other piece of BiiN software was written exclusively in Ada — perhaps the largest non-military use of that programming language.
There was a command line interpreter CLI, that resembled a lot command shells' functionality only a couple of years later, like editable history and so forth. Documentation for Gemini was done in troff with a project proprietary set of macros or with the Scribe_(markup_language)
- BiiN CPU Architecture Reference Manual (describes i960MX instruction set)
- BinN documentation at bitsavers.org