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The transistor count is the number of transistors in an electronic device. It typically refers to the number of MOSFETs (metal-oxide-semiconductor field-effect transistors, or MOS transistors) on an integrated circuit (IC) chip, as all modern ICs use MOSFETs. It is the most common measure of IC complexity (although the majority of transistors in modern microprocessors are contained in the cache memories, which consist mostly of the same memory cell circuits replicated many times). The rate at which MOS transistor counts have increased generally follows^{[citation needed]} Moore's law, which observed that the transistor count doubles approximately every two years.^[1]

As of 2022^[update], the largest transistor count in a commercially available microprocessor is 114 billion MOSFETs, in Apple's ARM-based dual-die M1 Ultra system on a chip, which is fabricated using TSMC's 5 nm semiconductor manufacturing process.^[2]^[3] As of 2022^[update], the highest transistor count GPU is Nvidia's H100, built on TSMC's N4 process and totalling 80 billion MOSFETs. As of 2019^[update], the highest transistor count in any IC chip was Samsung's 1 terabyte eUFS (3D-stacked) V-NAND flash memory chip, with 2 trillion floating-gate MOSFETs (4 bits per transistor).^[4] As of 2020^[update], the highest transistor count in any IC chip is a deep learning engine called the Wafer Scale Engine 2 by Cerebras, using a special design to route around any non-functional core on the device; it has 2.6 trillion MOSFETs, manufactured using TSMC's 7 nm FinFET process.^[5]^[6]^[7]^[8]^[9]

Year	Component	Name	Number of MOSFETs (in billions)
2022	microprocessor (commercial)	M1 Ultra	114 (dual die)
2022	GPU	Nvidia H100	80
2020	DLP	Colossus Mk2 GC200	59.4
2020	any IC chip	Wafer Scale Engine 2	2600 (wafer)
2019	any IC chip	Samsung's V-NAND chip	2000 (stack)

In terms of computer systems that consist of numerous integrated circuits, the supercomputer with the highest transistor count as of 2016^[update] is the Chinese-designed Sunway TaihuLight, which has for all CPUs/nodes combined "about 400 trillion transistors in the processing part of the hardware" and "the DRAM includes about 12 quadrillion transistors, and that's about 97 percent of all the transistors."^[10] To compare, the smallest computer, as of 2018^[update] dwarfed by a grain of rice, has on the order of 100,000 transistors. Early experimental solid state computers had as few as 130 transistors, but used large amounts of diode logic. The first carbon nanotube computer has 178 transistors and is a 1-bit one-instruction set computer, while a later one is 16-bit (while the instruction set is 32-bit RISC-V).

In terms of the total number of transistors in existence, it has been estimated that a total of 13 sextillion (1.3×10²²) MOSFETs have been manufactured worldwide between 1960 and 2018. MOSFETs account for at least 99.9% of all transistors, the majority of which have been used for NAND flash memory manufactured during the early 21st century. This makes the MOSFET the most widely manufactured device in history.^[11]

Transistor count

Among the earliest products to use transistors were portable transistor radios, introduced in 1954, which typically used 4 to 8 transistors, often advertising the number on the radio's case. However, early junction transistors were relatively bulky devices that were difficult to manufacture on a mass-production basis, limiting the transistor counts and restricting their usage to a number of specialised applications.^[12]

The MOSFET (MOS transistor), invented by Mohamed Atalla and Dawon Kahng at Bell Labs in 1959,^[13] was the first truly compact transistor that could be miniaturised and mass-produced for a wide range of uses.^[12] The MOSFET made it possible to build high-density integrated circuits (ICs),^[14] enabling Moore's law^[15]^[16] and very large-scale integration.^[17] Atalla first proposed the concept of the MOS integrated circuit (MOS IC) chip in 1960, followed by Kahng in 1961, both noting that the MOSFET's ease of fabrication made it useful for integrated circuits.^[12]^[18] The earliest experimental MOS IC to be demonstrated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at RCA Laboratories in 1962.^[16] Further large-scale integration was made possible with an improvement in MOSFET semiconductor device fabrication, the CMOS process, developed by Chih-Tang Sah and Frank Wanlass at Fairchild Semiconductor in 1963.^[19]

As the chip fabrication industry moves to newer processes, the number of transistors per unit area keeps rising. The transistor count and transistor density are often reported as technical achievements.^[20]

Microprocessors

A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit. It is a multi-purpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and provides results as output.

The development of MOS integrated circuit technology in the 1960s led to the development of the first microprocessors.^[21] The 20-bit MP944, developed by Garrett AiResearch for the U.S. Navy's F-14 Tomcat fighter in 1970, is considered by its designer Ray Holt to be the first microprocessor.^[22] It was a multi-chip microprocessor, fabricated on six MOS chips. However, it was classified by the Navy until 1998. The 4-bit Intel 4004, released in 1971, was the first single-chip microprocessor. It was made possible with an improvement in MOSFET design, MOS silicon-gate technology (SGT), developed in 1968 at Fairchild Semiconductor by Federico Faggin, who went on to use MOS SGT technology to develop the 4004 with Marcian Hoff, Stanley Mazor and Masatoshi Shima at Intel.^[21]

All chips over e.g. a million transistors have much memory, usually cache memories in level 1 and 2 or more levels, accounting for most transistors on microprocessors in modern times, where large caches have become the norm. The level 1 caches of the Pentium Pro die accounted for over 14% of its transistors, while the much larger L2 cache was on a separate die, but on-package, so it's not included in the transistor count. Later chips included more levels, L2 or even L3 on-chip. The last DEC Alpha chip made has 90% of it for cache.^[23]

While Intel's i960CA small cache of 1 KB, at about 50,000 transistors, isn't a big part of the chip, it alone would have been very large in early microprocessors. In the ARM 3 chip, with 4 KB, the cache was over 63% of the chip, and in the Intel 80486 its larger cache is only over a third of it because the rest of the chip is more complex. So cache memories are the largest factor, except for in early chips with smaller caches or even earlier chips with no cache at all. Then the inherent complexity, e.g. number of instructions, is the dominant factor, more than e.g. the memory the registers of the chip represent.

Processor	MOS transistor count	Date of introduction	Designer	MOS process (nm)	Area (mm²)	Transistor density, tr./mm²
MP944 (20-bit, 6-chip, 28 chips total)	74,442 (5,360 excl. ROM & RAM)^[24]^[25]	1970^[22]^[a]	Garrett AiResearch	?	?	?
Intel 4004 (4-bit, 16-pin)	2,250	1971	Intel	10,000 nm	12 mm²	188
TMX 1795 (?-bit, 24-pin)	3,078^[26]	1971	Texas Instruments	?	30.64 mm²	100.5
Intel 8008 (8-bit, 18-pin)	3,500	1972	Intel	10,000 nm	14 mm²	250
NEC μCOM-4 (4-bit, 42-pin)	2,500^[27]^[28]	1973	NEC	7,500 nm^[29]	?	?
Toshiba TLCS-12 (12-bit)	11,000+^[30]	1973	Toshiba	6,000 nm	32 mm²	340+
Intel 4040 (4-bit, 16-pin)	3,000	1974	Intel	10,000 nm	12 mm²	250
Motorola 6800 (8-bit, 40-pin)	4,100	1974	Motorola	6,000 nm	16 mm²	256
Intel 8080 (8-bit, 40-pin)	6,000	1974	Intel	6,000 nm	20 mm²	300
TMS 1000 (4-bit, 28-pin)	8,000	1974^[31]	Texas Instruments	8,000 nm	11 mm²	730
MOS Technology 6502 (8-bit, 40-pin)	4,528^[b]^[32]	1975	MOS Technology	8,000 nm	21 mm²	216
Intersil IM6100 (12-bit, 40-pin; clone of PDP-8)	4,000	1975	Intersil	?	?	?
CDP 1801 (8-bit, 2-chip, 40-pin)	5,000	1975	RCA	?	?	?
RCA 1802 (8-bit, 40-pin)	5,000	1976	RCA	5,000 nm	27 mm²	185
Zilog Z80 (8-bit, 4-bit ALU, 40-pin)	8,500^[c]	1976	Zilog	4,000 nm	18 mm²	470
Intel 8085 (8-bit, 40-pin)	6,500	1976	Intel	3,000 nm	20 mm²	325
TMS9900 (16-bit)	8,000	1976	Texas Instruments	?	?	?
Bellmac-8 (8-bit)	7,000	1977	Bell Labs	5,000 nm	?	?
Motorola 6809 (8-bit with some 16-bit features, 40-pin)	9,000	1978	Motorola	5,000 nm	21 mm²	430
Intel 8086 (16-bit, 40-pin)	29,000	1978	Intel	3,000 nm	33 mm²	880
Zilog Z8000 (16-bit)	17,500^[33]	1979	Zilog	?	?	?
Intel 8088 (16-bit, 8-bit data bus)	29,000	1979	Intel	3,000 nm	33 mm²	880
Motorola 68000 (16/32-bit, 32-bit registers, 16-bit ALU)	68,000^[34]	1979	Motorola	3,500 nm	44 mm²	1550
Intel 8051 (8-bit, 40-pin)	50,000	1980	Intel	?	?	?
WDC 65C02	11,500^[35]	1981	WDC	3,000 nm	6 mm²	1920
ROMP (32-bit)	45,000	1981	IBM	2,000 nm	?	?
Intel 80186 (16-bit, 68-pin)	55,000	1982	Intel	3,000 nm	60 mm²	920
Intel 80286 (16-bit, 68-pin)	134,000	1982	Intel	1,500 nm	49 mm²	2730
WDC 65C816 (8/16-bit)	22,000^[36]	1983	WDC	3,000 nm^[37]	9 mm²	2400
NEC V20	63,000	1984	NEC	?	?	?
Motorola 68020 (32-bit; 114 pins used)	190,000^[38]	1984	Motorola	2,000 nm	85 mm²	2200
Intel 80386 (32-bit, 132-pin; no cache)	275,000	1985	Intel	1,500 nm	104 mm²	2640
ARM 1 (32-bit; no cache)	25,000^[38]	1985	Acorn	3,000 nm	50 mm²	500
Novix NC4016 (16-bit)	16,000^[39]	1985^[40]	Harris Corporation	3,000 nm^[41]	?	?
SPARC MB86900 (32-bit; no cache)	110,000^[42]	1986	Fujitsu	1,200 nm	?	?
NEC V60^[43] (32-bit; no cache)	375,000	1986	NEC	1,500 nm	?	?
ARM 2 (32-bit, 84-pin; no cache)	27,000^[44]^[38]	1986	Acorn	2,000 nm	30.25 mm²	890
Z80000 (32-bit; very small cache)	91,000	1986	Zilog	?	?	?
NEC V70^[43] (32-bit; no cache)	385,000	1987	NEC	1,500 nm	?	?
Hitachi Gmicro/200^[45]	730,000	1987	Hitachi	1,000 nm	?	?
Motorola 68030 (32-bit, very small caches)	273,000	1987	Motorola	800 nm	102 mm²	2680
TI Explorer's 32-bit Lisp machine chip	553,000^[46]	1987	Texas Instruments	2,000 nm^[47]	?	?
DEC WRL MultiTitan	180,000^[48]	1988	DEC WRL	1,500 nm	61 mm²	2950
Intel i960 (32-bit, 33-bit memory subsystem, no cache)	250,000^[49]	1988	Intel	1,500 nm^[50]	?	?
Intel i960CA (32-bit, cache)	600,000^[50]	1989	Intel	800 nm	143 mm²	4200
Intel i860 (32/64-bit, 128-bit SIMD, cache, VLIW)	1,000,000^[51]	1989	Intel	?	?	?
Intel 80486 (32-bit, 4 KB cache)	1,180,235	1989	Intel	1000 nm	173 mm²	6822
ARM 3 (32-bit, 4 KB cache)	310,000	1989	Acorn	1,500 nm	87 mm²	3600
Motorola 68040 (32-bit, 8 KB caches)	1,200,000	1990	Motorola	650 nm	152 mm²	7900
R4000 (64-bit, 16 KB of caches)	1,350,000	1991	MIPS	1,000 nm	213 mm²	6340
ARM 6 (32-bit, no cache for this 60 variant)	35,000	1991	ARM	800 nm	?	?
Hitachi SH-1 (32-bit, no cache)	600,000^[52]	1992^[53]	Hitachi	800 nm	10 mm²	60,000 (check)
Intel i960CF (32-bit, cache)	900,000^[50]	1992	Intel	?	125 mm²	7200
DEC Alpha 21064 (64-bit, 290-pin; 16 KB of caches)	1,680,000	1992	DEC	750 nm	233.52 mm²	7190
Hitachi HARP-1 (32-bit, cache)	2,800,000^[54]	1993	Hitachi	500 nm	267 mm²	10,500
Pentium (32-bit, 16 KB of caches)	3,100,000	1993	Intel	800 nm	294 mm²	10,500
ARM700 (32-bit; 8 KB cache)	578,977^[55]	1994	ARM	700 nm	68.51 mm²	8451
MuP21 (21-bit,^[56] 40-pin; includes video)	7,000^[57]	1994	Offete Enterprises	1200 nm	?	?
Motorola 68060 (32-bit, 16 KB of caches)	2,500,000	1994	Motorola	600 nm	218 mm²	11,500
PowerPC 601 (32-bit, 32 KB of caches)	2,800,000^[58]	1994	Apple/IBM/Motorola	600 nm	121 mm²	23,000
SA-110 (32-bit, 32 KB of caches)	2,500,000^[38]	1995	Acorn/DEC/Apple	350 nm	50 mm²	50,000
Pentium Pro (32-bit, 16 KB of caches;^[59] L2 cache on-package, but on separate die)	5,500,000^[60]	1995	Intel	500 nm	307 mm²	18,000
AMD K5 (32-bit, caches)	4,300,000	1996	AMD	500 nm	251 mm²	17,000
Hitachi SH-4 (32-bit, caches)	10,000,000^[61]	1997	Hitachi	200 nm^[62]	42 mm²^[63]	238,000 (check)
Pentium II Klamath (32-bit, 64-bit SIMD, caches)	7,500,000	1997	Intel	350 nm	195 mm²	39,000
AMD K6 (32-bit, caches)	8,800,000	1997	AMD	350 nm	162 mm²	54,000
F21 (21-bit; includes e.g. video)	15,000	1997^[57]	Offete Enterprises	?	?	?
AVR (8-bit, 40-pin; w/memory)	140,000 (48,000 excl. memory^[64])	1997	Nordic VLSI/Atmel	?	?	?
Pentium II Deschutes (32-bit, large cache)	7,500,000	1998	Intel	250 nm	113 mm²	66,000
ARM 9TDMI (32-bit, no cache)	111,000^[38]	1999	Acorn	350 nm	4.8 mm²	23,100
Pentium III Katmai (32-bit, 128-bit SIMD, caches)	9,500,000	1999	Intel	250 nm	128 mm²	74,000
Emotion Engine (64-bit, 128-bit SIMD, cache)	13,500,000^[65]	1999	Sony/Toshiba	180 nm^[66]	240 mm²^[67]	56,300
Pentium II Mobile Dixon (32-bit, caches)	27,400,000	1999	Intel	180 nm	180 mm²	152,000
AMD K6-III (32-bit, caches)	21,300,000	1999	AMD	250 nm	118 mm²	181,000
AMD K7 (32-bit, caches)	22,000,000	1999	AMD	250 nm	184 mm²	120,000
Gekko (32-bit, large cache)	21,000,000^[68]	2000	IBM/Nintendo	180 nm	43 mm²	490,000 (check)
Pentium III Coppermine (32-bit, large cache)	21,000,000	2000	Intel	180 nm	80 mm²	263,000
Pentium 4 Willamette (32-bit, large cache)	42,000,000	2000	Intel	180 nm	217 mm²	194,000
SPARC64 V (64-bit, large cache)	191,000,000^[69]	2001	Fujitsu	130 nm^[70]	290 mm²	659,000
Pentium III Tualatin (32-bit, large cache)	45,000,000	2001	Intel	130 nm	81 mm²	556,000
Pentium 4 Northwood (32-bit, large cache)	55,000,000	2002	Intel	130 nm	145 mm²	379,000
Itanium 2 McKinley (64-bit, large cache)	220,000,000	2002	Intel	180 nm	421 mm²	523,000
DEC Alpha 21364 (64-bit, 946-pin, SIMD, very large caches)	152,000,000^[23]	2003	DEC	180 nm	397 mm²	383,000
Barton (32-bit, large cache)	54,300,000	2003	AMD	130 nm	101 mm²	538,000
AMD K8 (64-bit, large cache)	105,900,000	2003	AMD	130 nm	193 mm²	548,700
Itanium 2 Madison 6M (64-bit)	410,000,000	2003	Intel	130 nm	374 mm²	1,096,000
Pentium 4 Prescott (32-bit, large cache)	112,000,000	2004	Intel	90 nm	110 mm²	1,018,000
SPARC64 V+ (64-bit, large cache)	400,000,000^[71]	2004	Fujitsu	90 nm	294 mm²	1,360,000
Itanium 2 (64-bit;9 MB cache)	592,000,000	2004	Intel	130 nm	432 mm²	1,370,000
Pentium 4 Prescott-2M (32-bit, large cache)	169,000,000	2005	Intel	90 nm	143 mm²	1,182,000
Pentium D Smithfield (32-bit, large cache)	228,000,000	2005	Intel	90 nm	206 mm²	1,107,000
Xenon (64-bit, 128-bit SIMD, large cache)	165,000,000	2005	IBM	90 nm	?	?
Cell (32-bit, cache)	250,000,000^[72]	2005	Sony/IBM/Toshiba	90 nm	221 mm²	1,131,000
Pentium 4 Cedar Mill (32-bit, large cache)	184,000,000	2006	Intel	65 nm	90 mm²	2,044,000
Pentium D Presler (32-bit, large cache)	362,000,000	2006	Intel	65 nm	162 mm²	2,235,000
Core 2 Duo Conroe (dual-core 64-bit, large caches)	291,000,000	2006	Intel	65 nm	143 mm²	2,035,000
Dual-core Itanium 2 (64-bit, SIMD, large caches)	1,700,000,000^[73]	2006	Intel	90 nm	596 mm²	2,852,000
AMD K10 quad-core 2M L3 (64-bit, large caches)	463,000,000^[74]	2007	AMD	65 nm	283 mm²	1,636,000
ARM Cortex-A9 (32-bit, (optional) SIMD, caches)	26,000,000^[75]	2007	ARM	45 nm	31 mm²	839,000
Core 2 Duo Wolfdale (dual-core 64-bit, SIMD, caches)	411,000,000	2007	Intel	45 nm	107 mm²	3,841,000
POWER6 (64-bit, large caches)	789,000,000	2007	IBM	65 nm	341 mm²	2,314,000
Core 2 Duo Allendale (dual-core 64-bit, SIMD, large caches)	169,000,000	2007	Intel	65 nm	111 mm²	1,523,000
Uniphier	250,000,000^[76]	2007	Matsushita	45 nm	?	?
SPARC64 VI (64-bit, SIMD, large caches)	540,000,000	2007^[77]	Fujitsu	90 nm	421 mm²	1,283,000
Core 2 Duo Wolfdale 3M (dual-core 64-bit, SIMD, large caches)	230,000,000	2008	Intel	45 nm	83 mm²	2,771,000
Core i7 (quad-core 64-bit, SIMD, large caches)	731,000,000	2008	Intel	45 nm	263 mm²	2,779,000
AMD K10 quad-core 6M L3 (64-bit, SIMD, large caches)	758,000,000^[74]	2008	AMD	45 nm	258 mm²	2,938,000
Atom (32-bit, large cache)	47,000,000	2008	Intel	45 nm	24 mm²	1,958,000
SPARC64 VII (64-bit, SIMD, large caches)	600,000,000	2008^[78]	Fujitsu	65 nm	445 mm²	1,348,000
Six-core Xeon 7400 (64-bit, SIMD, large caches)	1,900,000,000	2008	Intel	45 nm	503 mm²	3,777,000
Six-core Opteron 2400 (64-bit, SIMD, large caches)	904,000,000	2009	AMD	45 nm	346 mm²	2,613,000
SPARC64 VIIIfx (64-bit, SIMD, large caches)	760,000,000^[79]	2009	Fujitsu	45 nm	513 mm²	1,481,000
SPARC T3 (16-core 64-bit, SIMD, large caches)	1,000,000,000^[80]	2010	Sun/Oracle	40 nm	377 mm²	2,653,000
Six-core Core i7 (Gulftown)	1,170,000,000	2010	Intel	32 nm	240 mm²	4,875,000
POWER7 32M L3 (8-core 64-bit, SIMD, large caches)	1,200,000,000	2010	IBM	45 nm	567 mm²	2,116,000
Quad-core z196^[81] (64-bit, very large caches)	1,400,000,000	2010	IBM	45 nm	512 mm²	2,734,000
Quad-core Itanium Tukwila (64-bit, SIMD, large caches)	2,000,000,000^[82]	2010	Intel	65 nm	699 mm²	2,861,000
Xeon Nehalem-EX (8-core 64-bit, SIMD, large caches)	2,300,000,000^[83]	2010	Intel	45 nm	684 mm²	3,363,000
SPARC64 IXfx (64-bit, SIMD, large caches)	1,870,000,000^[84]	2011	Fujitsu	40 nm	484 mm²	3,864,000
Quad-core + GPU Core i7 (64-bit, SIMD, large caches)	1,160,000,000	2011	Intel	32 nm	216 mm²	5,370,000
Six-core Core i7/8-core Xeon E5 (Sandy Bridge-E/EP) (64-bit, SIMD, large caches)	2,270,000,000^[85]	2011	Intel	32 nm	434 mm²	5,230,000
Xeon Westmere-EX (10-core 64-bit, SIMD, large caches)	2,600,000,000	2011	Intel	32 nm	512 mm²	5,078,000
Atom "Medfield" (64-bit)	432,000,000^[86]	2012	Intel	32 nm	64 mm²	6,750,000
SPARC64 X (64-bit, SIMD, caches)	2,990,000,000^[87]	2012	Fujitsu	28 nm	600 mm²	4,983,000
AMD Bulldozer (8-core 64-bit, SIMD, caches)	1,200,000,000^[88]	2012	AMD	32 nm	315 mm²	3,810,000
Quad-core + GPU AMD Trinity (64-bit, SIMD, caches)	1,303,000,000	2012	AMD	32 nm	246 mm²	5,297,000
Quad-core + GPU Core i7 Ivy Bridge (64-bit, SIMD, caches)	1,400,000,000	2012	Intel	22 nm	160 mm²	8,750,000
POWER7+ (8-core 64-bit, SIMD, 80 MB L3 cache)	2,100,000,000	2012	IBM	32 nm	567 mm²	3,704,000
Six-core zEC12 (64-bit, SIMD, large caches)	2,750,000,000	2012	IBM	32 nm	597 mm²	4,606,000
Itanium Poulson (8-core 64-bit, SIMD, caches)	3,100,000,000	2012	Intel	32 nm	544 mm²	5,699,000
Xeon Phi (61-core 32-bit, 512-bit SIMD, caches)	5,000,000,000^[89]	2012	Intel	22 nm	720 mm²	6,944,000
Apple A7 (dual-core 64/32-bit ARM64, "mobile SoC", SIMD, caches)	1,000,000,000	2013	Apple	28 nm	102 mm²	9,804,000
Six-core Core i7 Ivy Bridge E (64-bit, SIMD, caches)	1,860,000,000	2013	Intel	22 nm	256 mm²	7,266,000
POWER8 (12-core 64-bit, SIMD, caches)	4,200,000,000	2013	IBM	22 nm	650 mm²	6,462,000
Xbox One main SoC (64-bit, SIMD, caches)	5,000,000,000	2013	Microsoft/AMD	28 nm	363 mm²	13,770,000
Quad-core + GPU Core i7 Haswell (64-bit, SIMD, caches)	1,400,000,000^[90]	2014	Intel	22 nm	177 mm²	7,910,000
Apple A8 (dual-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	2,000,000,000	2014	Apple	20 nm	89 mm²	22,470,000
Core i7 Haswell-E (8-core 64-bit, SIMD, caches)	2,600,000,000^[91]	2014	Intel	22 nm	355 mm²	7,324,000
Apple A8X (tri-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	3,000,000,000^[92]	2014	Apple	20 nm	128 mm²	23,440,000
Xeon Ivy Bridge-EX (15-core 64-bit, SIMD, caches)	4,310,000,000^[93]	2014	Intel	22 nm	541 mm²	7,967,000
Xeon Haswell-E5 (18-core 64-bit, SIMD, caches)	5,560,000,000^[94]	2014	Intel	22 nm	661 mm²	8,411,000
Quad-core + GPU GT2 Core i7 Skylake K (64-bit, SIMD, caches)	1,750,000,000	2015	Intel	14 nm	122 mm²	14,340,000
Dual-core + GPU Iris Core i7 Broadwell-U (64-bit, SIMD, caches)	1,900,000,000^[95]	2015	Intel	14 nm	133 mm²	14,290,000
Apple A9 (dual-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	2,000,000,000+	2015	Apple	14 nm (Samsung)	96 mm² (Samsung)	20,800,000+
	2,000,000,000+	2015	Apple	16 nm (TSMC)	104.5 mm² (TSMC)	19,100,000+
Apple A9X (dual core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	3,000,000,000+	2015	Apple	16 nm	143.9 mm²	20,800,000+
IBM z13 (64-bit, caches)	3,990,000,000	2015	IBM	22 nm	678 mm²	5,885,000
IBM z13 Storage Controller	7,100,000,000	2015	IBM	22 nm	678 mm²	10,472,000
SPARC M7 (32-core 64-bit, SIMD, caches)	10,000,000,000^[96]	2015	Oracle	20 nm	?	?
Qualcomm Snapdragon 835 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	3,000,000,000^[97]^[98]	2016	Qualcomm	10 nm	72.3 mm²	41,490,000
Core i7 Broadwell-E (10-core 64-bit, SIMD, caches)	3,200,000,000^[99]	2016	Intel	14 nm	246 mm²^[100]	13,010,000
Apple A10 Fusion (quad-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	3,300,000,000	2016	Apple	16 nm	125 mm²	26,400,000
HiSilicon Kirin 960 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	4,000,000,000^[101]	2016	Huawei	16 nm	110.00 mm²	36,360,000
Xeon Broadwell-E5 (22-core 64-bit, SIMD, caches)	7,200,000,000^[102]	2016	Intel	14 nm	456 mm²	15,790,000
Xeon Phi (72-core 64-bit, 512-bit SIMD, caches)	8,000,000,000	2016	Intel	14 nm	683 mm²	11,710,000
Zip CPU (32-bit, for FPGAs)	1,286 6-LUTs^[103]	2016	Gisselquist Technology	?	?	?
Qualcomm Snapdragon 845 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	5,300,000,000^[104]	2017	Qualcomm	10 nm	94 mm²	56,400,000
Qualcomm Snapdragon 850 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	5,300,000,000^[105]	2017	Qualcomm	10 nm	94 mm²	56,400,000
Apple A11 Bionic (hexa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	4,300,000,000	2017	Apple	10 nm	89.23 mm²	48,190,000
Zeppelin SoC Ryzen (64-bit, SIMD, caches)	4,800,000,000^[106]	2017	AMD	14 nm	192 mm²	25,000,000
Ryzen 5 1600 Ryzen (64-bit, SIMD, caches)	4,800,000,000^[107]	2017	AMD	14 nm	213 mm²	22,530,000
Ryzen 5 1600 X Ryzen (64-bit, SIMD, caches)	4,800,000,000^[108]	2017	AMD	14 nm	213 mm²	22,530,000
IBM z14 (64-bit, SIMD, caches)	6,100,000,000	2017	IBM	14 nm	696 mm²	8,764,000
IBM z14 Storage Controller (64-bit)	9,700,000,000	2017	IBM	14 nm	696 mm²	13,940,000
HiSilicon Kirin 970 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	5,500,000,000^[109]	2017	Huawei	10 nm	96.72 mm²	56,900,000
Xbox One X (Project Scorpio) main SoC (64-bit, SIMD, caches)	7,000,000,000^[110]	2017	Microsoft/AMD	16 nm	360 mm²^[110]	19,440,000
Xeon Platinum 8180 (28-core 64-bit, SIMD, caches)	8,000,000,000^[111]^{[disputed – discuss]}	2017	Intel	14 nm	?	?
POWER9 (64-bit, SIMD, caches)	8,000,000,000	2017	IBM	14 nm	695 mm²	11,500,000
Freedom U500 Base Platform Chip (E51, 4×U54) RISC-V (64-bit, caches)	250,000,000^[112]	2017	SiFive	28 nm	~30 mm²	8,330,000
SPARC64 XII (12-core 64-bit, SIMD, caches)	5,450,000,000^[113]	2017	Fujitsu	20 nm	795 mm²	6,850,000
Apple A10X Fusion (hexa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	4,300,000,000^[114]	2017	Apple	10 nm	96.40 mm²	44,600,000
Centriq 2400 (64/32-bit, SIMD, caches)	18,000,000,000^[115]	2017	Qualcomm	10 nm	398 mm²	45,200,000
AMD Epyc (32-core 64-bit, SIMD, caches)	19,200,000,000	2017	AMD	14 nm	768 mm²	25,000,000
HiSilicon Kirin 710 (octa-core ARM64 "mobile SoC", SIMD, caches)	5,500,000,000^[116]	2018	Huawei	12 nm	?	?
Apple A12 Bionic (hexa-core ARM64 "mobile SoC", SIMD, caches)	6,900,000,000^[117]^[118]	2018	Apple	7 nm	83.27 mm²	82,900,000
HiSilicon Kirin 980 (octa-core ARM64 "mobile SoC", SIMD, caches)	6,900,000,000^[119]	2018	Huawei	7 nm	74.13 mm²	93,100,000
Qualcomm Snapdragon 8cx / SCX8180 (octa-core ARM64 "mobile SoC", SIMD, caches)	8,500,000,000^[120]	2018	Qualcomm	7 nm	112 mm²	75,900,000
Qualcomm Snapdragon 855 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	6,700,000,000^[121]	2019	Qualcomm	7 nm	73 mm²	91,800,000
Qualcomm Snapdragon 865 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	10,300,000,000^[122]	2020	Qualcomm	7 nm	83.54 mm2^[123]	123,300,000
Apple A12X Bionic (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches)	10,000,000,000^[124]	2018	Apple	7 nm	122 mm²	82,000,000
Fujitsu A64FX (64/32-bit, SIMD, caches)	8,786,000,000^[125]	2018^[126]	Fujitsu	7 nm	?	?
Tegra Xavier SoC (64/32-bit)	9,000,000,000^[127]	2018	Nvidia	12 nm	350 mm²	25,700,000
AMD Ryzen 7 3700X (64-bit, SIMD, caches, I/O die)	5,990,000,000^[128]^[d]	2019	AMD	7 & 12 nm (TSMC)	199 (74+125) mm²	30,100,000
HiSilicon Kirin 990 4G	8,000,000,000^[129]	2019	Huawei	7 nm	90.00 mm²	89,000,000
Apple A13 (hexa-core 64-bit ARM64 "mobile SoC", SIMD, caches)	8,500,000,000^[130]^[131]	2019	Apple	7 nm	98.48 mm²	86,300,000
IBM z15 CP chip (12 cores, 256 MB L3 cache)	9,200,000,000^[132]	2019	IBM	14 nm	696 mm²	13,220,000
IBM z15 SC chip (960 MB L4 cache)	12,200,000,000	2019	IBM	14 nm	696 mm²	17,530,000
AMD Ryzen 9 3900X (64-bit, SIMD, caches, I/O die)	9,890,000,000^[133]^[134]	2019	AMD	7 & 12 nm (TSMC)	273 mm²	36,230,000
HiSilicon Kirin 990 5G	10,300,000,000^[135]	2019	Huawei	7 nm	113.31 mm²	90,900,000
AWS Graviton2 (64-bit, 64-core ARM-based, SIMD, caches)^[136]^[137]	30,000,000,000	2019	Amazon	7 nm	?	?
AMD Epyc Rome (64-bit, SIMD, caches)	39,540,000,000^[133]^[134]	2019	AMD	7 & 12 nm (TSMC)	1008 mm²	39,226,000
TI Jacinto TDA4VM (ARM A72, DSP, SRAM)	3,500,000,000 ^[138]	2020	Texas Instruments	16 nm	?	?
Apple A14 Bionic (hexa-core 64-bit ARM64 "mobile SoC", SIMD, caches)	11,800,000,000^[139]	2020	Apple	5 nm	88 mm²	134,100,000
Apple M1 (octa-core 64-bit ARM64 SoC, SIMD, caches)	16,000,000,000^[140]	2020	Apple	5 nm	119 mm²	134,500,000
HiSilicon Kirin 9000	15,300,000,000^[141]^[142]	2020	Huawei	5 nm	114 mm²	134,200,000
AMD Ryzen 7 5800H (64-bit, SIMD, caches, I/O and GPU)	10,700,000,000^[143]	2021	AMD	7 nm	180 mm²	59,440,000
AMD Epyc 7763 (Milan) (64-core, 64-bit)	?	2021	AMD	7 & 12 nm (TSMC)	1064 mm² (8x81+416)^[144]	?
Apple A15	15,000,000,000^[145]^[146]	2021	Apple	5 nm	107.68 mm²	139,300,000
Apple M1 Pro (10-core, 64-bit)	33,700,000,000^[147]	2021	Apple	5 nm	245mm²^[148]	137,600,000
Apple M1 Max (10-core, 64-bit)	57,000,000,000^[149]^[147]	2021	Apple	5 nm	432mm²^[148]	131,900,000
Power10 dual-chip module (30 SMT8 cores or 60 SMT4 cores)	2 x 18,000,000,000 ^[150]	2021	IBM	7 nm	2 x 602mm²	29,900,000
Intel Xeon Sapphire Rapids (56-core)	N/A	2022	Intel	"Intel 7" (previously 10 nm)	~1600mm² ^[151]	?
Apple M1 Ultra (20-core, 64 bit)	2 × 57,000,000,000^[2]^[3]	2022	Apple	5 nm	2 × 432mm²	131,900,000
AMD Epyc 7773X (Milan-X) (64 cores, 768 MB L3 cache)	Milan + 26,000,000,000^[152]	2022	AMD	7 & 12 nm (TSMC)	1352 mm² (Milan + 8×36)^[152]	?
IBM Telum dual-chip module (2×8 cores, 2×256 MB cache)	2 × 22,500,000,000^[153]^[154]	2022	IBM	7 nm (Samsung)	2 × 530mm²	42,450,000
Processor	MOS transistor count	Date of introduction	Designer	MOS process (nm)	Area (mm²)	Transistor density, tr./mm²

GPUs

A graphics processing unit (GPU) is a specialized electronic circuit designed to rapidly manipulate and alter memory to accelerate the building of images in a frame buffer intended for output to a display.

The designer refers to the technology company that designs the logic of the integrated circuit chip (such as Nvidia and AMD). The manufacturer refers to the semiconductor company that fabricates the chip using its semiconductor manufacturing process at a foundry (such as TSMC and Samsung Semiconductor). The transistor count in a chip is dependent on a manufacturer's fabrication process, with smaller semiconductor nodes typically enabling higher transistor density and thus higher transistor counts.

The random-access memory (RAM) that comes with GPUs (such as VRAM, SGRAM or HBM) greatly increase the total transistor count, with the memory typically accounting for the majority of transistors in a graphics card. For example, Nvidia's Tesla P100 has 15 billion FinFETs (16 nm) in the GPU in addition to 16 GB of HBM2 memory, totaling about 150 billion MOSFETs on the graphics card.^[155] The following table does not include the memory. For memory transistor counts, see the Memory section below.

Processor	MOS transistor count	Date of introduction	Designer(s)	Manufacturer(s)	MOS process	Area	Transistor density, tr./mm²	Ref
µPD7220 GDC	40,000	1982	NEC	NEC	5,000 nm			^[156]
ARTC HD63484	60,000	1984	Hitachi	Hitachi				^[157]
CBM Agnus	21,000	1985	Commodore	CSG	5,000 nm			^[158]^[159]
YM7101 VDP	100,000	1988	Yamaha, Sega	Yamaha				^[160]
Tom & Jerry	750,000	1993	Flare	IBM				^[160]
VDP1	1,000,000	1994	Sega	Hitachi	500 nm			^[161]^[162]
Sony GPU	1,000,000	1994	Toshiba	LSI	500 nm			^[163]^[164]^[165]
NV1	1,000,000	1995	Nvidia, Sega	SGS	500 nm	90 mm²	11,000	^[161]
Reality Coprocessor	2,600,000	1996	SGI	NEC	350 nm	81 mm²	32,100	^[166]
PowerVR	1,200,000	1996	VideoLogic	NEC	350 nm			^[167]
Voodoo Graphics	1,000,000	1996	3dfx	TSMC	500 nm			^[168]^[169]
Voodoo Rush	1,000,000	1997	3dfx	TSMC	500 nm			^[168]^[169]
NV3	3,500,000	1997	Nvidia	SGS, TSMC	350 nm	90 mm²	38,900	^[170]^[171]
PowerVR2 CLX2	10,000,000	1998	VideoLogic	NEC	250 nm	116 mm²	86,200	^[61]^[172]^[173]^[63]
i740	3,500,000	1998	Intel, Real3D	Real3D	350 nm			^[168]^[169]
Voodoo 2	4,000,000	1998	3dfx	TSMC	350 nm
Voodoo Rush	4,000,000	1998	3dfx	TSMC	350 nm
NV4	7,000,000	1998	Nvidia	TSMC	350 nm	90 mm²	78,000	^[168]^[171]
PowerVR2 PMX1	6,000,000	1999	VideoLogic	NEC	250 nm			^[174]
Rage 128	8,000,000	1999	ATI	TSMC, UMC	250 nm	70 mm²	114,000	^[169]
Voodoo 3	8,100,000	1999	3dfx	TSMC	250 nm			^[175]
Graphics Synthesizer	43,000,000	1999	Sony, Toshiba	Sony, Toshiba	180 nm	279 mm²	154,000	^[68]^[66]^[65]^[67]
NV5	15,000,000	1999	Nvidia	TSMC	250 nm	90 mm²	167,000	^[169]
NV10	17,000,000	1999	Nvidia	TSMC	220 nm	111 mm²	153,000	^[176]^[171]
NV11	20,000,000	2000	Nvidia	TSMC	180 nm	65 mm²	308,000	^[169]
NV15	25,000,000	2000	Nvidia	TSMC	180 nm	81 mm²	309,000	^[169]
Voodoo 4	14,000,000	2000	3dfx	TSMC	220 nm			^[168]^[169]
Voodoo 5	28,000,000	2000	3dfx	TSMC	220 nm			^[168]^[169]
R100	30,000,000	2000	ATI	TSMC	180 nm	97 mm²	309,000	^[169]
Flipper	51,000,000	2000	ArtX	NEC	180 nm	106 mm²	481,000	^[68]^[177]
PowerVR3 KYRO	14,000,000	2001	Imagination	ST	250 nm			^[168]^[169]
PowerVR3 KYRO II	15,000,000	2001	Imagination	ST	180 nm			^[168]^[169]
NV2A	60,000,000	2001	Nvidia	TSMC	150 nm			^[168]^[178]
NV20	57,000,000	2001	Nvidia	TSMC	150 nm	128 mm²	445,000	^[169]
NV25	63,000,000	2002	Nvidia	TSMC	150 nm	142 mm²	444,000
NV28	36,000,000	2002	Nvidia	TSMC	150 nm	101 mm²	356,000
NV17/18	29,000,000	2002	Nvidia	TSMC	150 nm	65 mm²	446,000
R200	60,000,000	2001	ATI	TSMC	150 nm	68 mm²	882,000
R300	107,000,000	2002	ATI	TSMC	150 nm	218 mm²	490,800
R360	117,000,000	2003	ATI	TSMC	150 nm	218 mm²	536,700
NV34	45,000,000	2003	Nvidia	TSMC	150 nm	124 mm²	363,000
NV34b	45,000,000	2004	Nvidia	TSMC	140 nm	91 mm²	495,000
NV30	125,000,000	2003	Nvidia	TSMC	130 nm	199 mm²	628,000
NV31	80,000,000	2003	Nvidia	TSMC	130 nm	121 mm²	661,000
NV35/38	135,000,000	2003	Nvidia	TSMC	130 nm	207 mm²	652,000
NV36	82,000,000	2003	Nvidia	IBM	130 nm	133 mm²	617,000
R480	160,000,000	2004	ATI	TSMC	130 nm	297 mm²	538,700
NV40	222,000,000	2004	Nvidia	IBM	130 nm	305 mm²	727,900
NV44	75,000,000	2004	Nvidia	IBM	130 nm	110 mm²	681,800
Xenos	232,000,000	2005	ATI	TSMC	90 nm	182 mm²	1,275,000	^[179]^[180]
RSX Reality Synthesizer	300,000,000	2005	Nvidia, Sony	Sony	90 nm	186 mm²	1,613,000	^[181]^[182]
NV41	222,000,000	2005	Nvidia	TSMC	110 nm	225 mm²	986,700	^[169]
NV42	198,000,000	2005	Nvidia	TSMC	110 nm	222 mm²	891,900
NV43	146,000,000	2005	Nvidia	TSMC	110 nm	154 mm²	948,100
G70	303,000,000	2005	Nvidia	TSMC, Chartered	110 nm	333 mm²	909,900
R520	321,000,000	2005	ATI	TSMC	90 nm	288 mm²	1,115,000	^[169]
RV530	157,000,000	2005	ATI	TSMC	90 nm	150 mm²	1,047,000
RV515	107,000,000	2005	ATI	TSMC	90 nm	100 mm²	1,070,000
R580	384,000,000	2006	ATI	TSMC	90 nm	352 mm²	1,091,000
G71	278,000,000	2006	Nvidia	TSMC	90 nm	196 mm²	1,418,000
G72	112,000,000	2006	Nvidia	TSMC	90 nm	81 mm²	1,383,000
G73	177,000,000	2006	Nvidia	TSMC	90 nm	125 mm²	1,416,000
G80	681,000,000	2006	Nvidia	TSMC	90 nm	480 mm²	1,419,000
G86 Tesla	210,000,000	2007	Nvidia	TSMC	80 nm	127 mm²	1,654,000
G84 Tesla	289,000,000	2007	Nvidia	TSMC	80 nm	169 mm²	1,710,000
RV560	330,000,000	2006	ATI	TSMC	80 nm	230 mm²	1,435,000
R600	700,000,000	2007	ATI	TSMC	80 nm	420 mm²	1,667,000
RV610	180,000,000	2007	ATI	TSMC	65 nm	85 mm²	2,118,000	^[169]
RV630	390,000,000	2007	ATI	TSMC	65 nm	153 mm²	2,549,000
GT200^[183]	1,400,000,000	2008	Nvidia	TSMC	65 nm	576 mm²	2,431,000
G92	754,000,000	2007	Nvidia	TSMC, UMC	65 nm	324 mm²	2,327,000
G94 Tesla	505,000,000	2008	Nvidia	TSMC	65 nm	240 mm²	2,104,000
G96 Tesla	314,000,000	2008	Nvidia	TSMC	65 nm	144 mm²	2,181,000
G98 Tesla	210,000,000	2008	Nvidia	TSMC	65 nm	86 mm²	2,442,000
RV620	181,000,000	2008	ATI	TSMC	55 nm	67 mm²	2,701,000	^[169]
RV635	378,000,000	2008	ATI	TSMC	55 nm	135 mm²	2,800,000
RV710	242,000,000	2008	ATI	TSMC	55 nm	73 mm²	3,315,000
RV730	514,000,000	2008	ATI	TSMC	55 nm	146 mm²	3,521,000
RV670	666,000,000	2008	ATI	TSMC	55 nm	192 mm²	3,469,000
RV770	956,000,000	2008	ATI	TSMC	55 nm	256 mm²	3,734,000
RV790	959,000,000	2008	ATI	TSMC	55 nm	282 mm²	3,401,000	^[184]^[169]
GT200b Tesla	1,400,000,000	2008	Nvidia	TSMC, UMC	55 nm	470 mm²	2,979,000	^[169]
G92b Tesla	754,000,000	2008	Nvidia	TSMC, UMC	55 nm	260 mm²	2,900,000
G94b Tesla	505,000,000	2008	Nvidia	TSMC, UMC	55 nm	196 mm²	2,577,000
G96b Tesla	314,000,000	2008	Nvidia	TSMC, UMC	55 nm	121 mm²	2,595,000
GT218 Tesla	260,000,000	2009	Nvidia	TSMC	40 nm	57 mm²	4,561,000	^[169]
GT216 Tesla	486,000,000	2009	Nvidia	TSMC	40 nm	100 mm²	4,860,000
GT215 Tesla	727,000,000	2009	Nvidia	TSMC	40 nm	144 mm²	5,049,000
RV740	826,000,000	2009	ATI	TSMC	40 nm	137 mm²	6,029,000
Cypress RV870	2,154,000,000	2009	ATI	TSMC	40 nm	334 mm²	6,449,000
Juniper RV840	1,040,000,000	2009	ATI	TSMC	40 nm	166 mm²	6,265,000
Redwood RV830	627,000,000	2010	AMD	TSMC	40 nm	104 mm²	6,029,000	^[169]
Cedar RV810	292,000,000	2010	AMD (formerly ATI)	TSMC	40 nm	59 mm²	4,949,000
Caicos RV910	370,000,000	2011	AMD	TSMC	40 nm	67 mm²	5,522,000
Turks RV930	716,000,000	2011	AMD	TSMC	40 nm	118 mm²	6,068,000
Barts RV940	1,700,000,000	2010	AMD	TSMC	40 nm	255 mm²	6,667,000
Cayman RV970	2,640,000,000	2010	AMD	TSMC	40 nm	389 mm²	6,789,000
GF100 Fermi	3,200,000,000	March 2010	Nvidia	TSMC	40 nm	526 mm²	6,084,000	^[185]
GF110 Fermi	3,000,000,000	November 2010	Nvidia	TSMC	40 nm	520 mm²	5,769,000	^[185]
GF104 Fermi	1,950,000,000	2011	Nvidia	TSMC	40 nm	332 mm²	5,873,000	^[169]
GF106 Fermi	1,170,000,000	2010	Nvidia	TSMC	40 nm	238 mm²	4,916,000	^[169]
GF108 Fermi	585,000,000	2011	Nvidia	TSMC	40 nm	116 mm²	5,043,000	^[169]
GF119 Fermi	292,000,000	2011	Nvidia	TSMC	40 nm	79 mm²	3,696,000	^[169]
Tahiti	4,312,711,873	2011	AMD	TSMC	28 nm	365 mm²	11,820,000	^[186]
Cape Verde	1,500,000,000	2012	AMD	TSMC	28 nm	123 mm²	12,200,000	^[169]
Pitcairn	2,800,000,000	2012	AMD	TSMC	28 nm	212 mm²	13,210,000	^[169]
GK110 Kepler	7,080,000,000	2012	Nvidia	TSMC	28 nm	561 mm²	12,620,000	^[187]^[188]
GK104 Kepler	3,540,000,000	2012	Nvidia	TSMC	28 nm	294 mm²	12,040,000	^[189]
GK106 Kepler	2,540,000,000	2012	Nvidia	TSMC	28 nm	221 mm²	11,490,000	^[169]
GK107 Kepler	1,270,000,000	2012	Nvidia	TSMC	28 nm	118 mm²	10,760,000	^[169]
GK208 Kepler	1,020,000,000	2013	Nvidia	TSMC	28 nm	79 mm²	12,910,000	^[169]
Oland	1,040,000,000	2013	AMD	TSMC	28 nm	90 mm²	11,560,000	^[169]
Bonaire	2,080,000,000	2013	AMD	TSMC	28 nm	160 mm²	13,000,000	^[169]
Durango (Xbox One)	4,800,000,000	2013	AMD	TSMC	28 nm	375 mm²	12,800,000	^[190]^[191]
Liverpool (PlayStation 4)	Unknown	2013	AMD	TSMC	28 nm	348 mm²	?	^[192]
Hawaii	6,300,000,000	2013	AMD	TSMC	28 nm	438 mm²	14,380,000	^[169]
GM200 Maxwell	8,000,000,000	2015	Nvidia	TSMC	28 nm	601 mm²	13,310,000
GM204 Maxwell	5,200,000,000	2014	Nvidia	TSMC	28 nm	398 mm²	13,070,000
GM206 Maxwell	2,940,000,000	2014	Nvidia	TSMC	28 nm	228 mm²	12,890,000
GM107 Maxwell	1,870,000,000	2014	Nvidia	TSMC	28 nm	148 mm²	12,640,000
Tonga	5,000,000,000	2014	AMD	TSMC, GlobalFoundries	28 nm	366 mm²	13,660,000
Fiji	8,900,000,000	2015	AMD	TSMC	28 nm	596 mm²	14,930,000
Durango 2 (Xbox One S)	5,000,000,000	2016	AMD	TSMC	16 nm	240 mm²	20,830,000	^[193]
Neo (PlayStation 4 Pro)	5,700,000,000	2016	AMD	TSMC	16 nm	325 mm²	17,540,000	^[194]
Polaris 10 "Ellesmere"	5,700,000,000	2016	AMD	Samsung, GlobalFoundries	14 nm	232 mm²	24,570,000	^[195]
Polaris 11 "Baffin"	3,000,000,000	2016	AMD	Samsung, GlobalFoundries	14 nm	123 mm²	24,390,000	^[169]^[196]
Polaris 12 "Lexa"	2,200,000,000	2017	AMD	Samsung, GlobalFoundries	14 nm	101 mm²	21,780,000	^[169]^[196]
GP100 Pascal	15,300,000,000	2016	Nvidia	TSMC, Samsung	16 nm	610 mm²	25,080,000	^[197]^[198]
GP102 Pascal	11,800,000,000	2016	Nvidia	TSMC, Samsung	16 nm	471 mm²	25,050,000	^[169]^[198]
GP104 Pascal	7,200,000,000	2016	Nvidia	TSMC	16 nm	314 mm²	22,930,000	^[169]^[198]
GP106 Pascal	4,400,000,000	2016	Nvidia	TSMC	16 nm	200 mm²	22,000,000	^[169]^[198]
GP107 Pascal	3,300,000,000	2016	Nvidia	Samsung	14 nm	132 mm²	25,000,000	^[169]^[198]
GP108 Pascal	1,850,000,000	2017	Nvidia	Samsung	14 nm	74 mm²	25,000,000	^[169]^[198]
Scorpio (Xbox One X)	6,600,000,000	2017	AMD	TSMC	16 nm	367 mm²	17,980,000	^[190]^[199]
Vega 10	12,500,000,000	2017	AMD	Samsung, GlobalFoundries	14 nm	484 mm²	25,830,000	^[200]
GV100 Volta	21,100,000,000	2017	Nvidia	TSMC	12 nm	815 mm²	25,890,000	^[201]
TU102 Turing	18,600,000,000	2018	Nvidia	TSMC	12 nm	754 mm²	24,670,000	^[202]
TU104 Turing	13,600,000,000	2018	Nvidia	TSMC	12 nm	545 mm²	24,950,000
TU106 Turing	10,800,000,000	2018	Nvidia	TSMC	12 nm	445 mm²	24,270,000
TU116 Turing	6,600,000,000	2019	Nvidia	TSMC	12 nm	284 mm²	23,240,000	^[203]
TU117 Turing	4,700,000,000	2019	Nvidia	TSMC	12 nm	200 mm²	23,500,000	^[204]
Vega 20	13,230,000,000	2018	AMD	TSMC	7 nm	331 mm²	39,970,000	^[169]
Navi 10	10,300,000,000	2019	AMD	TSMC	7 nm	251 mm²	41,040,000	^[205]
Navi 14	6,400,000,000	2019	AMD	TSMC	7 nm	158 mm²	40,510,000	^[206]
GA100 Ampere	54,200,000,000	2020	Nvidia	TSMC	7 nm	826 mm²	65,620,000	^[207]^[208]
GA102 Ampere	28,300,000,000	2020	Nvidia	Samsung	8 nm	628 mm²	45,035,000	^[209]^[210]
GA104 Ampere	17,400,000,000	2020	Nvidia	Samsung	8 nm	392 mm²	44,390,000	^[211]
GA106 Ampere	13,250,000,000	2021	Nvidia	Samsung	8 nm	276 mm²	48,010,000
Navi 21	26,800,000,000	2020	AMD	TSMC	7 nm	520 mm²	51,540,000
Navi 22	17,200,000,000	2021	AMD	TSMC	7 nm	335 mm²	51,340,000
Navi 23	11,060,000,000	2021	AMD	TSMC	7 nm	237 mm²	46,670,000
Navi 24	5,400,000,000	2022	AMD	TSMC	6 nm	107 mm²	50,470,000
MI250X Aldebaran	59,000,000,000	2021	AMD	TSMC	6 nm	N/A	?	^[212]
GH100 Hopper	80,000,000,000	2022	Nvidia	TSMC	4 nm	814 mm²	98,280,000	^[213]
Processor	MOS transistor count	Date of introduction	Designer(s)	Manufacturer(s)	MOS process	Area	Transistor density, tr./mm²	Ref

FPGA

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing.

FPGA	MOS transistor count	Date of introduction	Designer	Manufacturer	MOS process	Area	Transistor density, tr./mm²	Ref
Virtex	70,000,000	1997	Xilinx
Virtex-E	200,000,000	1998	Xilinx
Virtex-II	350,000,000	2000	Xilinx		130 nm
Virtex-II PRO	430,000,000	2002	Xilinx
Virtex-4	1,000,000,000	2004	Xilinx		90 nm
Virtex-5	1,100,000,000	2006	Xilinx	TSMC	65 nm			^[214]
Stratix IV	2,500,000,000	2008	Altera	TSMC	40 nm			^[215]
Stratix V	3,800,000,000	2011	Altera	TSMC	28 nm			^[216]
Arria 10	5,300,000,000	2014	Altera	TSMC	20 nm			^[217]
Virtex-7 2000T	6,800,000,000	2011	Xilinx	TSMC	28 nm			^[218]
Stratix 10 SX 2800	17,000,000,000	TBD	Intel	Intel	14 nm	560 mm²	30,400,000	^[219]^[220]
Virtex-Ultrascale VU440	20,000,000,000	Q1 2015	Xilinx	TSMC	20 nm			^[221]^[222]
Virtex-Ultrascale+ VU19P	35,000,000,000	2020	Xilinx	TSMC	16 nm	900 mm² ^[e]	38,900,000	^[223]^[224]^[225]
Versal VC1902	37,000,000,000	2H 2019	Xilinx	TSMC	7 nm			^[226]^[227]^[228]
Stratix 10 GX 10M	43,300,000,000	Q4 2019	Intel	Intel	14 nm	1400 mm² ^[e]	30,930,000	^[229]^[230]
Versal VP1802	92,000,000,000	2021 ?^[f]	Xilinx	TSMC	7 nm			^[231]^[232]

Memory

Semiconductor memory is an electronic data storage device, often used as computer memory, implemented on integrated circuits. Nearly all semiconductor memory since the 1970s have used MOSFETs (MOS transistors), replacing earlier bipolar junction transistors. There are two major types of semiconductor memory, random-access memory (RAM) and non-volatile memory (NVM). In turn, there are two major RAM types, dynamic random-access memory (DRAM) and static random-access memory (SRAM), as well as two major NVM types, flash memory and read-only memory (ROM).

Typical CMOS SRAM consists of six transistors per cell. For DRAM, 1T1C, which means one transistor and one capacitor structure, is common. Capacitor charged or not is used to store 1 or 0. For flash memory, the data is stored in floating gate, and the resistance of the transistor is sensed to interpret the data stored. Depending on how fine scale the resistance could be separated, one transistor could store up to 3-bits, meaning eight distinctive level of resistance possible per transistor. However, the fine the scale comes with cost of repeatability therefore reliability. Typically, low grade 2-bits MLC flash is used for flash drives, so a 16 GB flash drive contains roughly 64 billion transistors.

For SRAM chips, six-transistor cells (six transistors per bit) was the standard.^[233] DRAM chips during the early 1970s had three-transistor cells (three transistors per bit), before single-transistor cells (one transistor per bit) became standard since the era of 4 Kb DRAM in the mid-1970s.^[234]^[235] In single-level flash memory, each cell contains one floating-gate MOSFET (one transistor per bit),^[236] whereas multi-level flash contains 2, 3 or 4 bits per transistor.

Flash memory chips are commonly stacked up in layers, up to 128-layer in production,^[237] and 136-layer managed,^[238] and available in end-user devices up to 69-layer from manufacturers.

Random-access memory (RAM)
Chip name	Capacity (bits)	RAM type	Transistor count	Date of introduction	Manufacturer(s)	MOS process	Area	Transistor density, tr./mm²	Ref
—	1-bit	SRAM (cell)	6	1963	Fairchild	—	—	?	^[239]
—	1-bit	DRAM (cell)	1	1965	Toshiba	—	—	?	^[240]^[241]
?	8-bit	SRAM (bipolar)	48	1965	SDS, Signetics	?	?	?	^[239]
SP95	16-bit	SRAM (bipolar)	80	1965	IBM	?	?	?	^[242]
TMC3162	16-bit	SRAM (TTL)	96	1966	Transitron	—	?	?	^[235]
?	?	SRAM (MOS)	?	1966	NEC	?	?	?	^[234]
	256-bit	DRAM (IC)	256	1968	Fairchild	?	?	?	^[235]
	64-bit	SRAM (PMOS)	384	1968	Fairchild	?	?	?	^[234]
	144-bit	SRAM (NMOS)	864	1968	NEC	?	?	?	^[234]
1101	256-bit	SRAM (PMOS)	1,536	1969	Intel	12,000 nm	?	?	^[243]^[244]^[245]
1102	1 Kb	DRAM (PMOS)	3,072	1970	Intel, Honeywell	?	?	?	^[234]
1103	1 Kb	DRAM (PMOS)	3,072	1970	Intel	8,000 nm	10 mm²	307	^[246]^[233]^[247]^[235]
μPD403	1 Kb	DRAM (NMOS)	3,072	1971	NEC	?	?	?	^[248]
?	2 Kb	DRAM (PMOS)	6,144	1971	General Instrument	?	12.7 mm²	484	^[249]
2102	1 Kb	SRAM (NMOS)	6,144	1972	Intel	?	?	?	^[243]^[250]
?	8 Kb	DRAM (PMOS)	8,192	1973	IBM	?	18.8 mm²	436	^[249]
5101	1 Kb	SRAM (CMOS)	6,144	1974	Intel	?	?	?	^[243]
2116	16 Kb	DRAM (NMOS)	16,384	1975	Intel	?	?	?	^[251]^[235]
2114	4 Kb	SRAM (NMOS)	24,576	1976	Intel	?	?	?	^[243]^[252]
?	4 Kb	SRAM (CMOS)	24,576	1977	Toshiba	?	?	?	^[244]
	64 Kb	DRAM (NMOS)	65,536	1977	NTT	?	35.4 mm²	1851	^[249]
	64 Kb	DRAM (VMOS)	65,536	1979	Siemens	?	25.2 mm²	2601	^[249]
	16 Kb	SRAM (CMOS)	98,304	1980	Hitachi, Toshiba	?	?	?	^[253]
	256 Kb	DRAM (NMOS)	262,144	1980	NEC	1,500 nm	41.6 mm²	6302	^[249]
	256 Kb	DRAM (NMOS)	262,144	1980	NTT	1,000 nm	34.4 mm²	7620	^[249]
	64 Kb	SRAM (CMOS)	393,216	1980	Matsushita	?	?	?	^[253]
	288 Kb	DRAM	294,912	1981	IBM	?	25 mm²	11,800	^[254]
	64 Kb	SRAM (NMOS)	393,216	1982	Intel	1,500 nm	?	?	^[253]
	256 Kb	SRAM (CMOS)	1,572,864	1984	Toshiba	1,200 nm	?	?	^[253]^[245]
	8 Mb	DRAM	8,388,608	January 5, 1984	Hitachi	?	?	?	^[255]^[256]
	16 Mb	DRAM (CMOS)	16,777,216	1987	NTT	700 nm	148 mm²	113,400	^[249]
	4 Mb	SRAM (CMOS)	25,165,824	1990	NEC, Toshiba, Hitachi, Mitsubishi	?	?	?	^[253]
	64 Mb	DRAM (CMOS)	67,108,864	1991	Matsushita, Mitsubishi, Fujitsu, Toshiba	400 nm	?	?	^[253]
KM48SL2000	16 Mb	SDRAM	16,777,216	1992	Samsung	?	?	?	^[257]^[258]
?	16 Mb	SRAM (CMOS)	100,663,296	1992	Fujitsu, NEC	400 nm	?	?	^[253]
	256 Mb	DRAM (CMOS)	268,435,456	1993	Hitachi, NEC	250 nm	?	?	^[253]
	1 Gb	DRAM	1,073,741,824	January 9, 1995	NEC	250 nm	?	?	^[259]^[260]
		DRAM	1,073,741,824	January 9, 1995	Hitachi	160 nm	?	?	^[259]^[260]
		SDRAM	1,073,741,824	1996	Mitsubishi	150 nm	?	?	^[253]
		SDRAM (SOI)	1,073,741,824	1997	Hyundai	?	?	?	^[261]
	4 Gb	DRAM (4-bit)	1,073,741,824	1997	NEC	150 nm	?	?	^[253]
	4 Gb	DRAM	4,294,967,296	1998	Hyundai	?	?	?	^[261]
	8 Gb	SDRAM (DDR3)	8,589,934,592	April 2008	Samsung	50 nm	?	?	^[262]
	16 Gb	SDRAM (DDR3)	17,179,869,184	2008	Samsung	50 nm	?	?	^[262]
	32 Gb	SDRAM (HBM2)	34,359,738,368	2016	Samsung	20 nm	?	?	^[263]
	64 Gb	SDRAM (HBM2)	68,719,476,736	2017	Samsung	20 nm	?	?	^[263]
	128 Gb	SDRAM (DDR4)	137,438,953,472	2018	Samsung	10 nm	?	?	^[264]
	?	RRAM^[265] (3DSoC)^[266]	?	2019	SkyWater Technology^[267]	90 nm	?	?

Flash memory
Chip name	Capacity (bits)	Flash type	FGMOS transistor count	Date of introduction	Manufacturer(s)	MOS process	Area	Transistor density, tr./mm²	Ref
?	256 Kb	NOR	262,144	1985	Toshiba	2,000 nm	?	?	^[253]
	1 Mb	NOR	1,048,576	1989	Seeq, Intel	?
	4 Mb	NAND	4,194,304	1989	Toshiba	1,000 nm
	16 Mb	NOR	16,777,216	1991	Mitsubishi	600 nm
DD28F032SA	32 Mb	NOR	33,554,432	1993	Intel	?	280 mm²	120,000	^[243]^[268]
?	64 Mb	NOR	67,108,864	1994	NEC	400 nm	?	?	^[253]
	64 Mb	NAND	67,108,864	1996	Hitachi	400 nm
	128 Mb	NAND	134,217,728	1996	Samsung, Hitachi	?
	256 Mb	NAND	268,435,456	1999	Hitachi, Toshiba	250 nm
	512 Mb	NAND	536,870,912	2000	Toshiba	?	?	?	^[269]
	1 Gb	2-bit NAND	536,870,912	2001	Samsung	?	?	?	^[253]
	1 Gb	2-bit NAND	536,870,912	2001	Toshiba, SanDisk	160 nm	?	?	^[270]
	2 Gb	NAND	2,147,483,648	2002	Samsung, Toshiba	?	?	?	^[271]^[272]
	8 Gb	NAND	8,589,934,592	2004	Samsung	60 nm	?	?	^[271]
	16 Gb	NAND	17,179,869,184	2005	Samsung	50 nm	?	?	^[273]
	32 Gb	NAND	34,359,738,368	2006	Samsung	40 nm	?	?	^[273]
THGAM	128 Gb	Stacked NAND	128,000,000,000	April 2007	Toshiba	56 nm	252 mm²	507,900,000	^[274]
THGBM	256 Gb	Stacked NAND	256,000,000,000	2008	Toshiba	43 nm	353 mm²	725,200,000	^[275]
THGBM2	1 Tb	Stacked 4-bit NAND	256,000,000,000	2010	Toshiba	32 nm	374 mm²	684,500,000	^[276]
KLMCG8GE4A	512 Gb	Stacked 2-bit NAND	256,000,000,000	2011	Samsung	?	192 mm²	1,333,000,000	^[277]
KLUFG8R1EM	4 Tb	Stacked 3-bit V-NAND	1,365,333,333,504	2017	Samsung	?	150 mm²	9,102,000,000	^[278]
eUFS (1 TB)	8 Tb	Stacked 4-bit V-NAND	2,048,000,000,000	2019	Samsung	?	150 mm²	13,650,000,000	^[4]^[279]

Read-only memory (ROM)
Chip name	Capacity (bits)	ROM type	Transistor count	Date of introduction	Manufacturer(s)	MOS process	Area	Ref
?	?	PROM	?	1956	Arma	—	?	^[280]^[281]
?	1 Kb	ROM (MOS)	1,024	1965	General Microelectronics	?	?	^[282]
3301	1 Kb	ROM (bipolar)	1,024	1969	Intel	—	?	^[282]
1702	2 Kb	EPROM (MOS)	2,048	1971	Intel	?	15 mm²	^[283]
?	4 Kb	ROM (MOS)	4,096	1974	AMD, General Instrument	?	?	^[282]
2708	8 Kb	EPROM (MOS)	8,192	1975	Intel	?	?	^[243]
?	2 Kb	EEPROM (MOS)	2,048	1976	Toshiba	?	?	^[284]
µCOM-43 ROM	16 Kb	PROM (PMOS)	16,000	1977	NEC	?	?	^[285]
2716	16 Kb	EPROM (TTL)	16,384	1977	Intel	—	?	^[246]^[286]
EA8316F	16 Kb	ROM (NMOS)	16,384	1978	Electronic Arrays	?	436 mm²	^[282]^[287]
2732	32 Kb	EPROM	32,768	1978	Intel	?	?	^[243]
2364	64 Kb	ROM	65,536	1978	Intel	?	?	^[288]
2764	64 Kb	EPROM	65,536	1981	Intel	3,500 nm	?	^[243]^[253]
27128	128 Kb	EPROM	131,072	1982	Intel	?	?	^[243]^[253]
27256	256 Kb	EPROM (HMOS)	262,144	1983	Intel	?	?	^[243]^[289]
?	256 Kb	EPROM (CMOS)	262,144	1983	Fujitsu	?	?	^[290]
?	512 Kb	EPROM (NMOS)	524,288	1984	AMD	1,700 nm	?	^[253]
27512	512 Kb	EPROM (HMOS)	524,288	1984	Intel	?	?	^[243]^[291]
?	1 Mb	EPROM (CMOS)	1,048,576	1984	NEC	1,200 nm	?	^[253]
	4 Mb	EPROM (CMOS)	4,194,304	1987	Toshiba	800 nm
	16 Mb	EPROM (CMOS)	16,777,216	1990	NEC	600 nm
	16 Mb	MROM	16,777,216	1995	AKM, Hitachi	?	?	^[260]

Transistor computers

Before transistors were invented, relays were used in commercial tabulating machines and experimental early computers. The world's first working programmable, fully automatic digital computer,^[292] the 1941 Z3 22-bit word length computer, had 2,600 relays, and operated at a clock frequency of about 4–5 Hz. The 1940 Complex Number Computer had fewer than 500 relays,^[293] but it was not fully programmable. The earliest practical computers used vacuum tubes and solid-state diode logic. ENIAC had 18,000 vacuum tubes, 7,200 crystal diodes, and 1,500 relays, with many of the vacuum tubes containing two triode elements.

The second generation of computers were transistor computers that featured boards filled with discrete transistors, solid-state diodes and magnetic memory cores. The experimental 1953 48-bit Transistor Computer, developed at the University of Manchester, is widely believed to be the first transistor computer to come into operation anywhere in the world (the prototype had 92 point-contact transistors and 550 diodes).^[294] A later version the 1955 machine had a total of 250 junction transistors and 1300 point-contact diodes. The Computer also used a small number of tubes in its clock generator, so it was not the first fully transistorized. The ETL Mark III, developed at the Electrotechnical Laboratory in 1956, may have been the first transistor-based electronic computer using the stored program method. It had about "130 point-contact transistors and about 1,800 germanium diodes were used for logic elements, and these were housed on 300 plug-in packages which could be slipped in and out."^[295] The 1958 decimal architecture IBM 7070 was the first transistor computer to be fully programmable. It had about 30,000 alloy-junction germanium transistors and 22,000 germanium diodes, on approximately 14,000 Standard Modular System (SMS) cards. The 1959 MOBIDIC, short for "MOBIle DIgital Computer", at 12,000 pounds (6.0 short tons) mounted in the trailer of a semi-trailer truck, was a transistorized computer for battlefield data.

The third generation of computers used integrated circuits (ICs).^[296] The 1962 15-bit Apollo Guidance Computer used "about 4,000 "Type-G" (3-input NOR gate) circuits" for about 12,000 transistors plus 32,000 resistors.^[297] The IBM System/360, introduced 1964, used discrete transistors in hybrid circuit packs.^[296] The 1965 12-bit PDP-8 CPU had 1409 discrete transistors and over 10,000 diodes, on many cards. Later versions, starting with the 1968 PDP-8/I, used integrated circuits. The PDP-8 was later reimplemented as a microprocessor as the Intersil 6100, see below.^[298]

The next generation of computers were the microcomputers, starting with the 1971 Intel 4004. which used MOS transistors. These were used in home computers or personal computers (PCs).

This list includes early transistorized computers (second generation) and IC-based computers (third generation) from the 1950s and 1960s.

Computer	Transistor count	Year	Manufacturer	Notes	Ref
Transistor Computer	92	1953	University of Manchester	Point-contact transistors, 550 diodes. Lacked stored program capability.	^[294]
TRADIC	700	1954	Bell Labs	Point-contact transistors	^[294]
Transistor Computer (full size)	250	1955	University of Manchester	Discrete point-contact transistors, 1,300 diodes	^[294]
IBM 608	3,000	1955	IBM	Germanium transistors	^[299]
ETL Mark III	130	1956	Electrotechnical Laboratory	Point-contact transistors, 1,800 diodes, stored program capability	^[294]^[295]
Metrovick 950	200	1956	Metropolitan-Vickers	Discrete junction transistors
NEC NEAC-2201	600	1958	NEC	Germanium transistors	^[300]
Hitachi MARS-1	1,000	1958	Hitachi		^[301]
IBM 7070	30,000	1958	IBM	Alloy-junction germanium transistors, 22,000 diodes	^[302]
Matsushita MADIC-I	400	1959	Matsushita	Bipolar transistors	^[303]
NEC NEAC-2203	2,579	1959	NEC		^[304]
Toshiba TOSBAC-2100	5,000	1959	Toshiba		^[305]
IBM 7090	50,000	1959	IBM	Discrete germanium transistors	^[306]
PDP-1	2,700	1959	Digital Equipment Corporation	Discrete transistors
Mitsubishi MELCOM 1101	3,500	1960	Mitsubishi	Germanium transistors	^[307]
M18 FADAC	1,600	1960	Autonetics	Discrete transistors
D-17B	1,521	1962	Autonetics	Discrete transistors
NEC NEAC-L2	16,000	1964	NEC	Ge transistors	^[308]
IBM System/360	?	1964	IBM	Hybrid circuits
PDP-8 "Straight-8"	1409^[298]	1965	Digital Equipment Corporation	discrete transistors, 10,000 diodes
PDP-8/S	1001^[309]^[310]^[311]	1966	Digital Equipment Corporation	discrete transistors, diodes
PDP-8/I	1409^{[citation needed]}	1968^[312]	Digital Equipment Corporation	74 series TTL circuits^[313]
Apollo Guidance Computer Block I	12,300	1966	Raytheon / MIT Instrumentation Laboratory	4,100 ICs, each containing a 3-transistor, 3-input NOR gate. (Block II had 2,800 dual 3-input NOR gates ICs.)

Logic functions

Transistor count for generic logic functions is based on static CMOS implementation.^[314]

Function	Transistor count	Ref
NOT	2
Buffer	4
NAND 2-input	4
NOR 2-input	4
AND 2-input	6
OR 2-input	6
NAND 3-input	6
NOR 3-input	6
XOR 2-input	6
XNOR 2-input	8
MUX 2-input with TG	6
MUX 4-input with TG	18
NOT MUX 2-input	8
MUX 4-input	24
1-bit adder full	28
1-bit adder–subtractor	48
AND-OR-INVERT	6	^[315]
Latch, D gated	8
Flip-flop, edge triggered dynamic D with reset	12
8-bit multiplier	3,000
16-bit multiplier	9,000
32-bit multiplier	21,000	^{[citation needed]}
small-scale integration	2–100	^[316]
medium-scale integration	100–500	^[316]
large-scale integration	500–20,000	^[316]
very-large-scale integration	20,000–1,000,000	^[316]
ultra-large scale integration	>1,000,000

Parallel systems

Historically, each processing element in earlier parallel systems—like all CPUs of that time—was a serial computer built out of multiple chips. As transistor counts per chip increases, each processing element could be built out of fewer chips, and then later each multi-core processor chip could contain more processing elements.^[317]

Goodyear MPP: (1983?) 8 pixel processors per chip, 3,000 to 8,000 transistors per chip.^[317]

Brunel University Scape (single-chip array-processing element): (1983) 256 pixel processors per chip, 120,000 to 140,000 transistors per chip.^[317]

Cell Broadband Engine: (2006) with 9 cores per chip, had 234 million transistors per chip.^[318]

Other devices

Device type	Device name	Transistor count	Date of introduction	Designer(s)	Manufacturer(s)	MOS process	Area	Transistor density, tr./mm²	Ref
Deep learning engine / IPU^[g]	Colossus GC2	23,600,000,000	2018	Graphcore	TSMC	16 nm	~800 mm²	29,500,000	^[319]^[320]^[321]^{[better source needed]}
Deep learning engine / IPU	Wafer Scale Engine	1,200,000,000,000	2019	Cerebras	TSMC	16 nm	46,225 mm²	25,960,000	^[5]^[6]^[7]^[8]
Deep learning engine / IPU	Wafer Scale Engine 2	2,600,000,000,000	2020	Cerebras	TSMC	7 nm	46,225 mm²	56,250,000	^[9]^[322]

Transistor density

The transistor density is the number of transistors that are fabricated per unit area, typically measured in terms of the number of transistors per square millimeter (mm²). The transistor density usually correlates with the gate length of a semiconductor node (also known as a semiconductor manufacturing process), typically measured in nanometers (nm). As of 2019^[update], the semiconductor node with the highest transistor density is TSMC's 5 nanometer node, with 171.3 million transistors per square millimeter.^[323]

MOSFET nodes

Semiconductor nodes
Node name	Transistor density (transistors/mm²)	Production year	Process	MOSFET	Manufacturer(s)	Ref
?	?	1960	20,000 nm	PMOS	Bell Labs	^[324]^[325]
?	?	1960	20,000 nm	NMOS	Bell Labs	^[324]^[325]
?	?	1963	?	CMOS	Fairchild	^[19]
?	?	1964	?	PMOS	General Microelectronics	^[326]
?	?	1968	20,000 nm	CMOS	RCA	^[327]
?	?	1969	12,000 nm	PMOS	Intel	^[253]^[245]
?	?	1970	10,000 nm	CMOS	RCA	^[327]
?	300	1970	8,000 nm	PMOS	Intel	^[247]^[235]
?	?	1971	10,000 nm	PMOS	Intel	^[328]
?	480	1971	?	PMOS	General Instrument	^[249]
?	?	1973	?	NMOS	Texas Instruments	^[249]
?	220	1973	?	NMOS	Mostek	^[249]
?	?	1973	7,500 nm	NMOS	NEC	^[29]^[28]
?	?	1973	6,000 nm	PMOS	Toshiba	^[30]^[329]
?	?	1976	5,000 nm	NMOS	Hitachi, Intel	^[249]
?	?	1976	5,000 nm	CMOS	RCA
?	?	1976	4,000 nm	NMOS	Zilog
?	?	1976	3,000 nm	NMOS	Intel	^[330]
?	1,850	1977	?	NMOS	NTT	^[249]
?	?	1978	3,000 nm	CMOS	Hitachi	^[331]
?	?	1978	2,500 nm	NMOS	Texas Instruments	^[249]
?	?	1978	2,000 nm	NMOS	NEC, NTT
?	2,600	1979	?	VMOS	Siemens
?	7,280	1979	1,000 nm	NMOS	NTT
?	7,620	1980	1,000 nm	NMOS	NTT
?	?	1983	2,000 nm	CMOS	Toshiba	^[253]
?	?	1983	1,500 nm	CMOS	Intel	^[249]
?	?	1983	1,200 nm	CMOS	Intel
?	?	1984	800 nm	CMOS	NTT
?	?	1987	700 nm	CMOS	Fujitsu
?	?	1989	600 nm	CMOS	Mitsubishi, NEC, Toshiba	^[253]
?	?	1989	500 nm	CMOS	Hitachi, Mitsubishi, NEC, Toshiba
?	?	1991	400 nm	CMOS	Matsushita, Mitsubishi, Fujitsu, Toshiba
?	?	1993	350 nm	CMOS	Sony
?	?	1993	250 nm	CMOS	Hitachi, NEC
3LM	32,000	1994	350 nm	CMOS	NEC	^[166]
?	?	1995	160 nm	CMOS	Hitachi	^[253]
?	?	1996	150 nm	CMOS	Mitsubishi	^[253]
TSMC 180 nm	?	1998	180 nm	CMOS	TSMC	^[332]
CS80	?	1999	180 nm	CMOS	Fujitsu	^[333]
?	?	1999	180 nm	CMOS	Intel, Sony, Toshiba	^[243]^[66]
CS85	?	1999	170 nm	CMOS	Fujitsu	^[334]
Samsung 140 nm	?	1999	140 nm	CMOS	Samsung	^[253]
?	?	2001	130 nm	CMOS	Fujitsu, Intel	^[333]^[243]
Samsung 100 nm	?	2001	100 nm	CMOS	Samsung	^[253]
?	?	2002	90 nm	CMOS	Sony, Toshiba, Samsung	^[66]^[271]
CS100	?	2003	90 nm	CMOS	Fujitsu	^[333]
Intel 90 nm	1,450,000	2004	90 nm	CMOS	Intel	^[335]^[243]
Samsung 80 nm	?	2004	80 nm	CMOS	Samsung	^[336]
?	?	2004	65 nm	CMOS	Fujitsu, Toshiba	^[337]
Samsung 60 nm	?	2004	60 nm	CMOS	Samsung	^[271]
TSMC 45 nm	?	2004	45 nm	CMOS	TSMC
Elpida 90 nm	?	2005	90 nm	CMOS	Elpida Memory	^[338]
CS200	?	2005	65 nm	CMOS	Fujitsu	^[339]^[333]
Samsung 50 nm	?	2005	50 nm	CMOS	Samsung	^[273]
Intel 65 nm	2,080,000	2006	65 nm	CMOS	Intel	^[335]
Samsung 40 nm	?	2006	40 nm	CMOS	Samsung	^[273]
Toshiba 56 nm	?	2007	56 nm	CMOS	Toshiba	^[274]
Matsushita 45 nm	?	2007	45 nm	CMOS	Matsushita	^[76]
Intel 45 nm	3,300,000	2008	45 nm	CMOS	Intel	^[340]
Toshiba 43 nm	?	2008	43 nm	CMOS	Toshiba	^[275]
TSMC 40 nm	?	2008	40 nm	CMOS	TSMC	^[341]
Toshiba 32 nm	?	2009	32 nm	CMOS	Toshiba	^[342]
Intel 32 nm	7,500,000	2010	32 nm	CMOS	Intel	^[340]
?	?	2010	20 nm	CMOS	Hynix, Samsung	^[343]^[273]
Intel 22 nm	15,300,000	2012	22 nm	CMOS	Intel	^[340]
IMFT 20 nm	?	2012	20 nm	CMOS	IMFT	^[344]
Toshiba 19 nm	?	2012	19 nm	CMOS	Toshiba	^[344]
Hynix 16 nm	?	2013	16 nm	FinFET	SK Hynix	^[343]
TSMC 16 nm	28,880,000	2013	16 nm	FinFET	TSMC	^[345]^[346]
Samsung 10 nm	51,820,000	2013	10 nm	FinFET	Samsung	^[347]^[348]
Intel 14 nm	37,500,000	2014	14 nm	FinFET	Intel	^[340]
14LP	32,940,000	2015	14 nm	FinFET	Samsung	^[347]
TSMC 10 nm	52,510,000	2016	10 nm	FinFET	TSMC	^[345]^[349]
12LP	36,710,000	2017	12 nm	FinFET	GlobalFoundries, Samsung	^[196]
N7FF	96,500,000 101,850,000^[350]	2017	7 nm	FinFET	TSMC	^[351]^[352]^[353]
8LPP	61,180,000	2018	8 nm	FinFET	Samsung	^[347]
7LPE	95,300,000	2018	7 nm	FinFET	Samsung	^[352]
Intel 10 nm	100,760,000 106,100,000^[350]	2018	10 nm	FinFET	Intel	^[354]
5LPE	126,530,000 133,560,000^[350] 134,900,000^[355]	2018	5 nm	FinFET	Samsung	^[356]^[357]
N7FF+	113,900,000	2019	7 nm	FinFET	TSMC	^[351]^[352]
CLN5FF	171,300,000 185,460,000^[350]	2019	5 nm	FinFET	TSMC	^[323]
Intel 7	100,760,000 106,100,000^[350]	2021	7 nm	FinFET	Intel
4LPE	145,700,000^[355]	2021	4 nm	FinFET	Samsung	^[358]^[359]^[360]
N4	196,600,000^[350]^[361]	2021	4 nm	FinFET	TSMC	^[362]
N4P	196,600,000^[350]^[361]	2022	4 nm	FinFET	TSMC	^[363]
N3	314,730,000^[350]	2022	3 nm	FinFET	TSMC	^[364]^[365]
Intel 4	?	2022	4 nm	FinFET	Intel	^[366]^[367]^[368]
3GAE	202,850,000^[350]	2022	3 nm	MBCFET	Samsung	^[369]^[358]
N4X	?	2023	4 nm	FinFET	TSMC	^[370]^[371]^[372]
N3E	?	2023	3 nm	FinFET	TSMC	^[365]^[373]
3GAP	?	2023	3 nm	MBCFET	Samsung	^[358]
Intel 3	?	2023	3 nm	FinFET	Intel	^[367]^[368]
Intel 20A	?	2024	2 nm	RibbonFET	Intel	^[367]^[368]
Intel 18A	?	2025	sub-2 nm	RibbonFET	Intel	^[367]
Samsung 2 nm	?	2025	2 nm	MBCFET	Samsung	^[358]
N2	?	2025	2 nm	GAAFET	TSMC	^[365]^[373]

Notes

^ Declassified 1998
^ 3,510 without depletion mode pull-up transistors
^ 6,813 without depletion mode pull-up transistors
^ 3,900,000,000 core chiplet die, 2,090,000,000 I/O die
^ ^a ^b Estimate
^ Versal Premium are confirmed to be shipping in 1H 2021 but nothing was mentioned about the VP1802 in particular. Usually Xilinx makes separate news for the release of its biggest devices so the VP1802 is likely to be released later.
^ "Intelligence Processing Unit"

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External links

[26] Declassified 1998

[33] 3,510 without depletion mode pull-up transistors

[35] 6,813 without depletion mode pull-up transistors

[132] 3,900,000,000 core chiplet die, 2,090,000,000 I/O die

[estimate_fn-227] Estimate

[236] Versal Premium are confirmed to be shipping in 1H 2021 but nothing was mentioned about the VP1802 in particular. Usually Xilinx makes separate news for the release of its biggest devices so the VP1802 is likely to be released later.

[325] "Intelligence Processing Unit"

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@@ Line 705: / Line 705: @@
 |-
 |[[SPARC64 V]] (64-bit, large cache)
-|191,000,000<ref>{{cite conference| last1 = Ando| first1 = H.| last2  = Yoshida| first2 = Y.| last3 = Inoue| first3 = A.| last4 = Sugiyama| first4 = I.| last5  = Asakawa| first5 = T.| last6  = Morita| first6 = K.| last7  = Muta| first7 = T.| last8  = otokurumada| first8 = T.| last9  = Okada| first9 = S.| last10 = Yamashita| first10 = H.| last11 = Satsukawa| first11 = Y.| last12 = Konmoto| first12 = A.| last13 = Yamashita| first13 = R.| last14 = Sugiyama| first14 = H.| date = 2003| title = A 1.3GHz fifth eneration SPARC64 microprocessor| conference = Design Automation Conference| pages = 702&ndash;705| doi = 10.1145/775832.776010| isbn = 1-58113-688-9}}</ref>
+|191,000,000<ref>{{cite conference| last1 = Ando| first1 = H.| last2  = Yoshida| first2 = Y.| last3 = Inoue| first3 = A.| last4 = Sugiyama| first4 = I.| last5  = Asakawa| first5 = T.| last6  = Morita| first6 = K.| last7  = Muta| first7 = T.| last8  = otokurumada| first8 = T.| last9  = Okada| first9 = S.| last10 = Yamashita| first10 = H.| last11 = Satsukawa| first11 = Y.| last12 = Konmoto| first12 = A.| last13 = Yamashita| first13 = R.| last14 = Sugiyama| first14 = H.| date = 2003| title = A 1.3GHz fifth eneration SPARC64 microprocessor| chapter = A 1.3GHz fifth generation SPARC64 microprocessor| conference = Design Automation Conference| pages = 702&ndash;705| doi = 10.1145/775832.776010| isbn = 1-58113-688-9}}</ref>
 |2001
 |Fujitsu
@@ Line 4,409: / Line 4,409: @@
 |[[IBM]]
 |[[Germanium]] transistors
-|<ref>{{cite web |title=IBM 608 calculator |url=https://www.ibm.com/ibm/history/exhibits/vintage/vintage_4506VV2214.html |website=[[IBM]] |access-date=8 March 2021}}</ref>
+|<ref>{{cite web |title=IBM 608 calculator |url=https://www.ibm.com/ibm/history/exhibits/vintage/vintage_4506VV2214.html |website=[[IBM]] |date=January 23, 2003 |access-date=8 March 2021}}</ref>
 |-
 |[[Electrotechnical Laboratory|ETL]] Mark III
@@ Line 5,200: / Line 5,200: @@
 | CMOS
 | Intel
-| <ref name="intel-ieee">{{Cite web|url=https://spectrum.ieee.org/nanoclast/semiconductors/processors/intel-now-packs-100-million-transistors-in-each-square-millimeter|title=Intel Now Packs 100 Million Transistors in Each Square Millimeter|website=IEEE Spectrum: Technology, Engineering, and Science News|access-date=2018-11-14}}</ref>
+| <ref name="intel-ieee">{{Cite web|url=https://spectrum.ieee.org/nanoclast/semiconductors/processors/intel-now-packs-100-million-transistors-in-each-square-millimeter|title=Intel Now Packs 100 Million Transistors in Each Square Millimeter|website=IEEE Spectrum: Technology, Engineering, and Science News|date=March 30, 2017 |access-date=2018-11-14}}</ref>
 |-
 | Toshiba 43{{nbsp}}nm
@@ Line 5,397: / Line 5,397: @@
 | FinFET
 | Samsung
-| <ref name="samsung">{{cite web|url=https://news.samsung.com/global/samsung-foundry-innovations-power-the-future-of-big-data-ai-ml-and-smart-connected-devices|title=Samsung Foundry Innovations Power the Future of Big Data, AI/ML and Smart, Connected Devices|date=2021-10-07}}</ref><ref>{{cite web|url=https://www.sammobile.com/news/qualcomm-snapdragon-8-gen-1-made-using-samsung-4nm-process/|title=Qualcomm confirms Snapdragon 8 Gen 1 is made using Samsung’s 4nm process|date=2021-12-02}}</ref><ref>{{cite web|url=https://9to5google.com/2022/01/14/heres-every-smartphone-confirmed-to-use-the-qualcomm-snapdragon-8-gen-1-chip/|title=List of Snapdragon 8 Gen 1 smartphones available since December 2021|date=2022-01-14}}</ref>
+| <ref name="samsung">{{cite web|url=https://news.samsung.com/global/samsung-foundry-innovations-power-the-future-of-big-data-ai-ml-and-smart-connected-devices|title=Samsung Foundry Innovations Power the Future of Big Data, AI/ML and Smart, Connected Devices|date=2021-10-07}}</ref><ref>{{cite web|url=https://www.sammobile.com/news/qualcomm-snapdragon-8-gen-1-made-using-samsung-4nm-process/|title=Qualcomm confirms Snapdragon 8 Gen 1 is made using Samsung's 4nm process|date=2021-12-02}}</ref><ref>{{cite web|url=https://9to5google.com/2022/01/14/heres-every-smartphone-confirmed-to-use-the-qualcomm-snapdragon-8-gen-1-chip/|title=List of Snapdragon 8 Gen 1 smartphones available since December 2021|date=2022-01-14}}</ref>
 |-
 | [[5 nm process|N4]]